鍨嬭櫉锛歑C7K410T-2FBG900C
銆�銆�宸ヨ棟锛�28nm
銆�銆�FPGA 瀹舵棌锛欰rtix-7
銆�銆�閭忚集鍠�鍏冿��410,000
銆�銆�DSP Slice锛�550
銆�銆�Block RAM锛氱磩 26.5Mb
銆�銆�閰嶇疆闁冨瓨锛氱劇鍏�(n猫i)缃�
銆�銆�I/O 鏁�(sh霉)閲忥細504
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +100掳C
銆�銆�灏佽�濆舰寮忥細FBGA 900 寮曡叧
銆�銆�鏅傞悩绠＄悊妯″�婏細MMCM 鍜� PLL
銆�銆�鍔熻�楃瓑绱氾細浣庡姛鑰�

XC7K410T-2FBG900C 鎻愪緵楂樺害鍙�绶ㄧ▼鎬у拰闈堟椿鎬�锛屽叿鏈変互涓嬩富瑕佺壒榛烇細
銆�銆�1. 澶у�归噺閭忚集璩囨簮鏀�鎸佸京闆滅殑鏁�(sh霉)瀛楅浕璺�瑷�(sh猫)瑷堬紝渚嬪�傛��(sh霉)鎿�(j霉)铏曠悊銆佸湒鍍忚檿鐞嗙瓑銆�
銆�銆�2. 鍏�(n猫i)缃� DSP Slice 鎻愰珮浜嗘暩(sh霉)瀛椾俊铏熻檿鐞嗚兘鍔涳紝閬╁悎绠楁硶瀵嗛泦鍨嬫噳(y墨ng)鐢�銆�
銆�銆�3. 鍖呭惈澶氬�� Block RAM 鍠�鍏冿紝鑳藉�犲瓨鍎插ぇ閲忎腑闁撴暩(sh霉)鎿�(j霉)鎴栦綔鐐哄�栭儴瀛樺劜鍣ㄦ帴鍙ｇ珐娌�銆�
銆�銆�4. 鏀�鎸佸�氱ó楂橀�熸帴鍙ｅ崝(xi茅)璀�锛屼緥濡� PCIe銆丼ATA銆佸崈鍏嗕互澶�缍�(w菐ng)绛�銆�
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銆�銆�6. FPGA 鐨勫嫊鎱�(t脿i)閮ㄥ垎閲嶆柊閰嶇疆鍔熻兘鍏佽ū鍦ㄩ亱琛屾湡闁撹��(di脿o)鏁寸‖浠跺姛鑳�锛屽緸鑰屽劒(y艒u)鍖栬硣婧愬埄鐢ㄧ巼鍜岃兘鑰�銆�
銆�銆�7. 绗﹀悎 RoHS 妯欐簴锛岀挵(hu谩n)淇濅笖鑰愮敤銆�
銆�銆�姝ゅ��锛屽畠閭勫吋瀹� Vivado Design Suite 闁嬬櫦(f膩)鐠�(hu谩n)澧冿紝渚夸簬闁嬬櫦(f膩)浜哄摗蹇�閫熷畬鎴愬緸瑷�(sh猫)瑷堝埌瀵︾従(xi脿n)鐨勬暣鍊嬫祦绋�銆�

XC7K410T-2FBG900C 涓昏�佹��(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
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銆�銆�6. 閱�(y墨)鐧傛垚鍍忚ō(sh猫)鍌�锛屽�傝秴鑱叉尝鍜孋T鎺冩弿鍎�涓�鐨勬��(sh霉)鎿�(j霉)閲囬泦鑸囪檿鐞嗗柈鍏�銆�
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XC7K410T-3FBG900C
銆�銆�XC7A410T-2FFG900C
銆�銆�XC7A410T-3FFG900C