鍨嬭櫉(h脿o)锛歑C7K70T-2FB676I
銆�銆�宸ヨ棟锛�28nm
銆�銆�閭忚集鍠�鍏冿��71,520
銆�銆�DSP Slice 鏁�(sh霉)閲忥細320
銆�銆�Block RAM 瀹归噺锛�2.9 Mbits
銆�銆�鍏�(n猫i)閮� FIFO 瀹归噺锛氶珮閬�(d谩) 512KB
銆�銆�鐢ㄦ埗(h霉) I/O 鏁�(sh霉)閲忥細420
銆�銆�閰嶇疆妯″紡锛歋electMAP銆丮aster SPI銆丼lave SPI銆丅PI
銆�銆�灏佽�濓細FBGA 676
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +100掳C

XC7K70T-2FB676I 鐨勪富瑕佺壒鎬у寘鎷�锛�
銆�銆�1. 楂樻晥鐨� FPGA 鏋舵��(g貌u)锛屾彁渚涘挤(qi谩ng)澶х殑閭忚集铏曠悊鑳藉姏銆�
銆�銆�2. 鍏�(n猫i)缃� DSP 妯″��锛岄仼鐢ㄤ簬寰�(f霉)闆滅殑鏁�(sh霉)瀛椾俊铏�(h脿o)铏曠悊浠诲嫏(w霉)銆�
銆�銆�3. 鏀�鎸侀珮閫熶覆琛屾敹鐧�(f膩)鍣�锛屾暩(sh霉)鎿�(j霉)鍌宠几閫熺巼鏈�楂樺彲閬�(d谩) 6.6Gbps锛屽彲鐢ㄤ簬閫ｆ帴澶栭儴瑷�(sh猫)鍌欐垨缍�(w菐ng)绲�(lu貌)鎺ュ彛銆�
銆�銆�4. 澶у�归�� Block RAM 鍜屽垎甯冨紡 RAM锛岀偤寰�(f霉)闆滅畻娉曟彁渚涜冻澶犵殑瀛樺劜(ch菙)绌洪枔銆�
銆�銆�5. 鎻愪緵澶氱ó鏅�(sh铆)閻樼�＄悊宸ュ叿锛圡MCM 鍜� PLL锛�锛屾敮鎸侀潏娲荤殑鏅�(sh铆)閻樺垎闋诲拰鍊嶉牷鎿嶄綔銆�
銆�銆�6. 浣庡姛鑰楄ō(sh猫)瑷�(j矛)锛岀壒鍒ラ仼鍚堜究鏀滃紡瑷�(sh猫)鍌欐垨?q奴)未鑺庢尃琚�?y谩n)鏍艰�佹眰鐨勫��(ch菐ng)鍚堛��
銆�銆�7. 鏀�鎸佸�氱ó閰嶇疆鏂瑰紡锛屼究浜庣郴绲�(t菕ng)闆嗘垚鍜岃��(di脿o)瑭�銆�
銆�銆�8. 鎻愪緵瀹屾暣鐨勯枊(k膩i)鐧�(f膩)宸ュ叿閺堬紙濡� Vivado Design Suite锛�锛岀啊(ji菐n)鍖栬ō(sh猫)瑷�(j矛)娴佺▼骞舵彁楂橀枊(k膩i)鐧�(f膩)鏁堢巼銆�

XC7K70T-2FB676I 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 閫氫俊琛屾キ(y猫)锛氱敤浜庡熀绔欒ō(sh猫)瑷�(j矛)銆佷俊铏�(h脿o)铏曠悊鍜屽崝(xi茅)璀拌綁(zhu菐n)鎻�銆�
銆�銆�2. 寤ｆ挱鍜岃�栭牷铏曠悊锛氭敮鎸侀珮娓呭拰瓒呴珮娓呰�栭牷娴佺殑瀵�(sh铆)鏅�(sh铆)绶ㄧ⒓瑙ｇ⒓鍙婂湒鍍忓�炲��(qi谩ng)銆�
銆�銆�3. 宸ユキ(y猫)鑷�鍕�(d貌ng)鍖栵細瀵�(sh铆)鐝�(xi脿n)寰�(f霉)闆滅殑鎺у埗閭忚集銆侀亱(y霉n)鍕�(d貌ng)鎺у埗鍜屾暩(sh霉)鎿�(j霉)閲囬泦銆�
銆�銆�4. 閱�(y墨)鐧傛垚鍍忥細鏀�鎸侀珮鍒嗚鲸鐜囧湒鍍忚檿鐞嗗拰瑷烘柗瑷�(sh猫)鍌欑殑鏁�(sh霉)鎿�(j霉)鍒嗘瀽銆�
銆�銆�5. 鑸�绌鸿埅澶╋細鍦ㄧ��(hu谩n)澧冩儭鍔ｆ�濅欢涓嬮��(y霉n)琛�锛屽煼(zh铆)琛岄棞(gu膩n)閸典换鍕�(w霉)鐨勮▓(j矛)绠楀拰鎺у埗鍔熻兘銆�
銆�銆�6. 娑堣不(f猫i)闆诲瓙锛氱敤浜庢櫤鑳藉�堕浕涓�鐨勫祵鍏ュ紡绯荤当(t菕ng)鎺у埗銆�
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XC7K70T-3FB676I
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銆�銆�XC7A50T-2FGG484I