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闁辫畝锛�14
XC7VH580T-1FL1155C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Virtex-7 绯诲垪楂樼 FPGA 鑺墖銆傝┎绯诲垪鑺墖閲囩敤 28nm 鍒堕�犲伐钘�锛屽皥鐐洪珮鎬ц兘瑷堢畻銆佷俊铏熻檿鐞�銆侀�氫俊绯荤当(t菕ng)鍜屽叾浠栧京闆滄暩(sh霉)瀛楄ō瑷堣�屽劒(y艒u)鍖�銆俋C7VH580T 闆嗘垚浜嗚睈瀵岀殑閭忚集璩囨簮銆丏SP Slice銆丅lock RAM 鍜岄珮閫熶覆琛屾敹鐧�(f膩)鍣ㄧ瓑妯″锛屾敮鎸佸绋厤缃伕闋呭拰闈堟椿鐨� I/O 妯欐簴锛岄仼鐢ㄤ簬寰炶埅绌鸿埅澶╁埌閱�(y墨)鐧傛垚鍍忕瓑寤ｆ硾闋樺煙銆�
銆�銆�瑭插瀷铏熶腑鐨勫叿楂斿弮鏁�(sh霉)鍖呮嫭锛�'H' 琛ㄧず楂樺付瀵増鏈�锛�'580T' 琛ㄧず閭忚集鍠厓鐨勬暩(sh霉)閲忥紙绱� 580K锛�锛�'-1' 琛ㄧず閫熷害绛夌礆锛�'FL1155' 琛ㄧず灏佽椤炲瀷锛�'C' 琛ㄧず鍟嗙敤婧害鑼冨湇銆�
閭忚集鍠厓鏁�(sh霉)锛�580,000
銆�銆�DSP Slice 鏁�(sh霉)閲忥細2340
銆�銆�Block RAM 瀹归噺锛�3696 KB
銆�銆�鐢ㄦ埗 I/O 鏁�(sh霉)閲忥細744
銆�銆�閰嶇疆闁冨瓨澶�?銆傜瘶/A锛堝缃厤缃瓨鍎诧級
銆�銆�宸ヤ綔闆诲锛�0.9V 鏍稿績闆诲锛�1.0V I/O 闆诲
銆�銆�灏佽椤炲瀷锛欶L1155 (1155 寮曡叧)
銆�銆�閫熷害绛夌礆锛�-1
銆�銆�婧害鑼冨湇锛�0掳C 鑷� 85掳C锛堝晢鐢ㄧ礆锛�
XC7VH580T-1FL1155C 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 鏀寔楂橀仈 13.1 Gbps 鐨勯珮閫熶覆琛屾敹鐧�(f膩)鍣�锛岄仼鍚堟暩(sh霉)鎿�(j霉)瀵嗛泦鍨嬫噳鐢�銆�
銆�銆�2. 鍏х疆寮峰ぇ鐨� DSP 妯″锛屾彁渚涢珮鏁堢殑娴粸閬嬬畻鍜屾烤娉㈣兘鍔�銆�
銆�銆�3. 鎻愪緵澶у閲� Block RAM 鍜屽垎甯冨紡 RAM 璩囨簮锛岀敤浜庣珐瀛樺拰鏁�(sh霉)鎿�(j霉)瀛樺劜銆�
銆�銆�4. 鏀寔澶氱ó閰嶇疆妯″紡锛屽 Slave Serial銆丮aster SelectMAP 鍜� JTAG銆�
銆�銆�5. 鍏锋湁闈堟椿鐨勬檪閻樼鐞嗗姛鑳�锛屽寘鎷� PLL 鍜� MMCM 妯″锛屽彲鐢熸垚绮剧⒑鐨勬檪閻樹俊铏�銆�
銆�銆�6. 鏀寔 DDR3/DDR2/LPDDR 鍏у瓨鎺ュ彛锛屽鐝�(xi脿n)楂樻晥鐨勬暩(sh霉)鎿�(j霉)鍌宠几銆�
銆�銆�7. 鎻愪緵璞愬瘜鐨勭‖鏍� IP锛屼緥濡� PCIe Gen3銆�10Gb Ethernet MAC 鍜� Interlaken 绛�銆�
銆�銆�8. 鍙法绋嬪姛鑰楁妧琛�锛屽彲鏍规摎(j霉)瀵﹂殯闇�姹傚嫊鎱�(t脿i)瑾挎暣鑺墖鎬ц兘鍜屽姛鑰楀钩琛°��
XC7VH580T-1FL1155C 寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊鍩虹瑷柦锛屽鍩虹珯銆佽矾鐢卞櫒鍜屼氦鎻涙銆�
銆�銆�2. 楂樻�ц兘瑷堢畻锛屽寘鎷湇鍕欏櫒鍔犻�熷崱鍜岀瀛歌▓绠�銆�
銆�銆�3. 鍦栧儚铏曠悊鑸囪▓绠楁瑕栬锛屼緥濡傞啱(y墨)鐧傛垚鍍忚ō鍌欏拰宸ユキ(y猫)妾㈡脯绯荤当(t菕ng)銆�
銆�銆�4. 鑸┖鑸ぉ鑸囧湅闃�锛屾秹鍙婇浄閬旂郴绲�(t菕ng)銆佽(w猫i)鏄熼�氫俊鍜屽皫鑸ō鍌�銆�
銆�銆�5. 宸ユキ(y猫)鑷嫊鍖栵紝鐢ㄤ簬瀵︽檪鎺у埗鍜屾暩(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)銆�
銆�銆�6. 娓│娓噺鍎�鍣�锛屽绀烘尝鍣ㄣ�佷俊铏熺櫦(f膩)鐢熷櫒鍜屽崝(xi茅)璀板垎鏋愬剙銆�
XC7VH580T-2FL1155C
銆�銆�XC7VH580T-3FL1155C
