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鍨嬭櫉锛歑C7VX980T-1FFG1926I
銆€銆€灏佽锛欶FG1926
銆€銆€I/O 鏁�(sh霉)閲忥細1434
銆€銆€閰嶇疆闁冨瓨锛氱劇鍏�(n猫i)缃杻瀛�
銆€銆€宸ヤ綔婧害鑼冨湇锛氬伐妤�(y猫)绱氾紙-40掳C 鑷� +85掳C锛�
銆€銆€宸ヨ棟绡€(ji茅)榛烇細28nm
銆€銆€鍏�(n猫i)鏍搁浕澹擄細1.0V
銆€銆€杓稿叆杓稿嚭闆诲锛�1.8V/2.5V/3.3V
銆€銆€FPGA 瀹归噺锛�980K Logic Cells
銆€銆€RAM 璩囨簮锛�68Mb
銆€銆€DSP Slice 鏁�(sh霉)閲忥細3240
銆€銆€鏈€澶у伐浣滈牷鐜囷細550MHz
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XC7VX980T 鏄竴娆鹃珮搴﹂泦鎴愮殑 FPGA锛屽叾涓昏鐗归粸鍖呮嫭锛�
銆€銆€1. 楂樻€ц兘閭忚集绲�(ji茅)妲�(g貌u)锛氬熀浜� UltraScale 鏋舵(g貌u)鎶€琛�(sh霉)锛屾敮鎸侀珮鏁堢殑鏁�(sh霉)鎿�(j霉)璺緫鍎�(y艒u)鍖�銆�
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銆€銆€3. 寮峰ぇ鐨� DSP 鏀寔锛氭搧鏈� 3240 鍊� DSP Slice锛屽彲婊胯冻楂樼簿搴︽诞榛為亱绠楀拰鐭╅櫍涔樻硶闇€姹�銆�
銆€銆€4. 楂橀€熸敹鐧�(f膩)鍣細闆嗘垚澶氶仈 72 鍊� GTH/GTX 鏀剁櫦(f膩)鍣�锛屾渶楂樻敮鎸侀€熺巼鍙仈 13.1Gbps锛岄仼鍚堥珮閫熼€氫俊鎺ュ彛瑷�(sh猫)瑷�銆�
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銆€銆€7. 寤ｆ硾鐨勬噳(y墨ng)鐢ㄥ牬鏅細寰炶埅绌鸿埅澶╁埌閱�(y墨)鐧傚奖鍍�锛屽啀鍒版暩(sh霉)鎿�(j霉)涓績鍔犻€�锛岃┎鍣ㄤ欢閮借兘鎻愪緵鍗撹秺鐨勬€ц兘琛ㄧ従(xi脿n)銆�

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銆€銆€1. 楂樻€ц兘瑷堢畻锛氫緥濡傞噾铻嶅缓妯�銆佸熀鍥犵祫鍒嗘瀽绛夐渶瑕佸ぇ閲忓苟琛岃▓绠楃殑浠诲嫏(w霉)銆�
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