鍨嬭櫉(h脿o)锛歑C7Z010-1CLG225C
銆�銆�宸ヨ棟锛�28nm
銆�銆�灏佽�濓細CLG225
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +100掳C
銆�銆�ARM铏曠悊鍣�锛氶洐鏍� ARM Cortex-A9
銆�銆�涓婚牷锛�667 MHz
銆�銆�鐗囦笂瀛樺劜(ch菙)鍣�锛�280KB
銆�銆�FPGA鏋舵��(g貌u)锛欰rtix-7
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細28K
銆�銆�RAM濉婂�归噺锛�1148Kb
銆�銆�DSP Slice鏁�(sh霉)閲忥細90
銆�銆�I/O寮曡叧鏁�(sh霉)閲忥細214
銆�銆�閰嶇疆闁冨瓨鏀�鎸侊細涓嶅��(n猫i)缃�
銆�銆�鍔熻�楋細闈滄厠(t脿i)鍔熻�楃磩 1W锛屽嫊(d貌ng)鎱�(t脿i)鍔熻�楀彇姹轰簬鍏烽珨鎳�(y墨ng)鐢�

XC7Z010-1CLG225C 鐨勪富瑕佺壒鎬у寘鎷�锛�
銆�銆�1. 闆嗘垚浜嗛洐鏍� ARM Cortex-A9 MPCore 铏曠悊鍣ㄥ瓙绯荤当(t菕ng)锛屽叿鏈� NEON 鍜� FPU 鍗�(xi茅)铏曠悊鍣�锛屾敮鎸侀珮鏁堢殑娴�榛�(di菐n)閬�(y霉n)绠楀拰澶氬獟楂旇檿鐞�銆�
銆�銆�2. 鍏�(n猫i)缃�璞愬瘜鐨勫�栬ō(sh猫)鎺ュ彛鎺у埗鍣�锛屼緥濡� Gigabit Ethernet銆乁SB銆丼DIO銆丆AN 鍜� UART 绛�锛岀啊鍖栦簡宓屽叆寮忕郴绲�(t菕ng)鐨勯�ｆ帴銆�
銆�銆�3. 鍙�绶ㄧ▼閭忚集閮ㄥ垎鍩轰�� Artix-7 FPGA 鏋舵��(g貌u)锛屾彁渚涢潏娲荤殑纭�浠跺姞閫熻兘鍔�锛屾敮鎸佽嚜瀹氱京 IP 鏍哥殑瀵�(sh铆)鐝�(xi脿n)銆�
銆�銆�4. 鏀�鎸� AXI 绺界窔鏋舵��(g貌u)锛屽��(sh铆)鐝�(xi脿n)铏曠悊鍣ㄥ拰 FPGA 閭忚集涔嬮枔鐨勯珮鏁堟暩(sh霉)鎿�(j霉)鍌宠几銆�
銆�銆�5. 鎻愪緵澶氱ó闆绘簮绠＄悊閬搁爡(xi脿ng)锛屽寘鎷�鍕�(d貌ng)鎱�(t脿i)闆诲�撹��(di脿o)绡�(ji茅)鍜屾檪(sh铆)閻橀杸鎺ф妧琛�(sh霉)锛屼互闄嶄綆鏁撮珨鍔熻��銆�
銆�銆�6. 鍖呮嫭鍏�(n猫i)閮� PLL 鍜� DCM 妯″��锛屾敮鎸侀潏娲荤殑鏅�(sh铆)閻樼敓鎴愬拰鍒嗛厤鍔熻兘銆�
銆�銆�7. 楂樺害闆嗘垚鐨勮ō(sh猫)瑷�(j矛)娓涘皯浜嗘澘绱�(j铆)鍏冧欢鏁�(sh霉)閲�锛岄檷浣庝簡绯荤当(t菕ng)鎴愭湰骞舵彁楂樹簡鍙�闈犳��銆�
銆�銆�8. 闁嬬櫦(f膩)宸ュ叿鏀�鎸佽壇濂斤紝浣跨�� Vivado Design Suite 鍜� SDK 宸ュ叿鍙�浠ュ揩閫熷畬鎴愯粺纭�浠跺��(xi茅)鍚岃ō(sh猫)瑷�(j矛)銆�
銆�銆�9. 鎻愪緵鍏ㄩ潰鐨勫畨鍏ㄧ壒鎬�锛屽�� AES 鍔犲瘑寮曟搸銆丼HA 鍜� RSA 瑾�(r猫n)璀夋ā濉�锛岀⒑淇濈郴绲�(t菕ng)瀹夊叏鎬�銆�

XC7Z010-1CLG225C 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 宓屽叆寮忚�栬�虹郴绲�(t菕ng)锛氬�傛��(j墨)鍣ㄨ�栬�虹浉姗�(j墨)銆佽�栭牷鐩�(ji膩n)鎺цō(sh猫)鍌�銆�
銆�銆�2. 宸ユキ(y猫)鑷�鍕�(d貌ng)鍖栵細鐢ㄤ簬閬�(y霉n)鍕�(d貌ng)鎺у埗銆佹��(j墨)鍣ㄤ汉鎺у埗鍜屽伐妤�(y猫)鐗╄伅(li谩n)缍�(w菐ng)缍�(w菐ng)闂�(gu膩n)銆�
銆�銆�3. 閫氫俊瑷�(sh猫)鍌欙細濡傚皬鍨嬪熀绔�銆佺劇绶氭帴鍏ラ粸(di菐n)鍜屽崝(xi茅)璀拌綁(zhu菐n)鎻涘櫒銆�
銆�銆�4. 閱�(y墨)鐧傝ō(sh猫)鍌欙細鍖呮嫭瓒呰伈娉㈣ō(sh猫)鍌�銆佷究鏀滃紡瑷烘柗鍎�鍣�銆�
銆�銆�5. 娑堣不(f猫i)闆诲瓙锛氶珮绔�闊宠�栭牷铏曠悊瑷�(sh猫)鍌�銆佹櫤鑳藉�跺眳鎺у埗鍣�銆�
銆�銆�6. 鑸�绌鸿埅澶╁拰鍦嬮槻锛氶渶瑕侀珮鍙�闈犳�у拰浣庡欢閬茬殑鎳�(y墨ng)鐢ㄥ牬鏅�銆�
銆�銆�鍏堕潏娲绘�у拰楂樻�ц兘浣垮叾鎴愮偤澶氶牁(l菒ng)鍩熷京(f霉)闆滄噳(y墨ng)鐢ㄧ殑鐞嗘兂閬告搰銆�

XC7Z010-2CLG225C
銆�銆�XC7Z010-3CLG225C