鍨嬭櫉(h脿o)锛歑C7Z012S-2CLG485I
銆�銆�绯诲垪锛歓ynq-7000
銆�銆�灏佽�濋�炲瀷锛欳LG485
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +85掳C
銆�銆�FPGA閭忚集鍠�鍏冩��(sh霉)閲忥細绱�35,400鍊�(g猫)
銆�銆�RAM濉婂�归噺锛氱��1.6Mb
銆�銆�DSP Slice鏁�(sh霉)閲忥細220鍊�(g猫)
銆�銆�鏅�(sh铆)閻橀牷鐜囷細鏈�楂樺彲閬�(d谩)667MHz
銆�銆�ARM铏曠悊鍣�锛氶洐鏍窩ortex-A9
銆�銆�绶╁瓨澶�?銆�?2KB I-Cache 鍜� 32KB D-Cache per core
銆�銆�DDR鎺у埗鍣ㄦ敮鎸侊細楂橀仈(d谩)1866Mbps

XC7Z012S-2CLG485I鐨勪富瑕佺壒鎬у寘鎷�锛�
銆�銆�1. 楂樻�ц兘闆欐牳ARM Cortex-A9铏曠悊鍣ㄥ瓙绯荤当(t菕ng)锛屽寘鍚玁EON濯掗珨铏曠悊寮曟搸鍜屾诞榛�(di菐n)鍠�鍏�锛岄仼鍚堥亱(y霉n)琛屽��(sh铆)鏅�(sh铆)鎿嶄綔绯荤当(t菕ng)鎴朙inux绛夊京(f霉)闆滆粺浠剁挵(hu谩n)澧冦��
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銆�銆�3. 鍏�(n猫i)缃瓺DR3/DDR2/RLDRAM II/LPDDR2瀛樺劜(ch菙)鍣ㄦ帶鍒跺櫒锛岀⒑淇濋珮鏁堟暩(sh霉)鎿�(j霉)鍌宠几銆�
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銆�銆�6. 鎻愪緵璞愬瘜鐨勮��(di脿o)瑭﹀拰杩借工鍔熻兘锛屼緥濡傜墖涓婂垎鏋愬剙锛圕hipScope锛�銆丣TAG鎺ュ彛绛�锛屾柟渚垮晱椤屽畾浣嶅拰鍎�(y艒u)鍖�銆�
銆�銆�7. 绗﹀悎澶氶爡(xi脿ng)宸ユキ(y猫)妯�(bi膩o)婧�(zh菙n)瑕�(gu墨)鑼冿紝淇濊瓑鍙�闈犳�у拰鍏煎�规��銆�

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銆�銆�1. 宓屽叆寮忚�栬�虹郴绲�(t菕ng)锛屼緥濡傛櫤鑳界洠(ji膩n)鎺�?c谩i)z鍍忛牠銆佹��(j墨)鍣ㄨ�栬�烘�㈡��(c猫)瑷�(sh猫)鍌欑瓑銆�
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銆�銆�5. 娑堣不(f猫i)椤為浕瀛愮敘(ch菐n)鍝侊紝渚嬪�傞珮绔�鏁�(sh霉)纰肩浉姗�(j墨)銆佹父鎴蹭富姗�(j墨)绛夈��
銆�銆�鐢变簬鍏堕珮搴﹂潏娲绘�у拰寮�(qi谩ng)澶ф�ц兘锛孹C7Z012S-2CLG485I鎴愮偤瑷卞�氬��(f霉)闆滅郴绲�(t菕ng)鐨勭悊鎯抽伕鎿�銆�

XC7Z010-2CLG485I, XC7Z015-2CLG485I, XC7Z020-2CLG485I