XCKU035-2SFVA784I 鏅傞枔锛�2025/6/3 21:22:28 闁辫畝锛�11

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銆€銆€閫欐 FPGA 鎻愪緵浜嗚睈瀵岀殑閭忚集璩囨簮銆丏SP 妯″銆侀珮閫熸敹鐧�(f膩)鍣ㄥ拰澶у閲忕殑濉婂瓨鍎插櫒锛屽悓鏅傛敮鎸佸绋帴鍙ｆ(bi膩o)婧�(zh菙n)鍜屽崝(xi茅)璀�銆傚畠閲囩敤浜嗗厛閫�(j矛n)鐨� FinFET 鍒堕€犲伐钘濓紝鍏峰倷楂樻€ц兘鍜屼綆鍔熻€楃殑鐗归粸(di菐n)銆�

鍙冩暩(sh霉)

鍨嬭櫉锛歑CKU035-2SFVA784I
銆€銆€绯诲垪锛欿intex UltraScale
銆€銆€鍝佺墝锛歑ilinx
銆€銆€閭忚集鍠厓鏁�(sh霉)锛氱磩 195,000
銆€銆€DSP 妯″鏁�(sh霉)閲忥細2,000
銆€銆€RAM 瀹归噺锛氱磩 14.7 Mb
銆€銆€I/O 鏁�(sh霉)閲忥細鏈€澶� 920
銆€銆€閰嶇疆妯″紡锛歋electMAP, Master/Slave SPI, BPI
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆€銆€灏佽褰㈠紡锛歋FVA784
銆€銆€鏅傞悩璩囨簮锛氬閬�(d谩) 16 鍊� PLL

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XCKU035-2SFVA784I 鍏峰倷寮�(qi谩ng)澶х殑鎬ц兘鍜岄潏娲绘€�锛屽叾涓昏鐗规€у寘鎷細
銆€銆€1. 楂橀€熶覆琛屾敹鐧�(f膩)鍣ㄦ敮鎸侀珮閬�(d谩) 16.3 Gbps 鐨勯€熺巼锛岄仼鍚堝悇绋珮閫熸帴鍙ｉ渶姹�銆�
銆€銆€2. 鍏�(n猫i)缃� DDR4銆丏DR3 鍜� LPDDR3 瀛樺劜鍣ㄦ帶鍒跺櫒锛屾彁渚涢珮鏁堢殑鍏�(n猫i)瀛樿í鍟忚兘鍔�銆�
銆€銆€3. 鏀寔 PCIe Gen3 x8 鎺ュ彛锛屾豢瓒虫暩(sh霉)鎿�(j霉)瀵嗛泦鍨嬫噳(y墨ng)鐢ㄧ殑闇€姹�銆�
銆€銆€4. 闆嗘垚浜嗚睈瀵岀殑鏁�(sh霉)瀛椾俊铏熻檿鐞� (DSP) 妯″锛岄仼鐢ㄤ簬寰�(f霉)闆滅殑绠楁硶瀵�(sh铆)鐝�(xi脿n)銆�
銆€銆€5. 鎻愪緵闈堟椿鐨勬檪閻樼鐞嗗姛鑳�锛屽寘鎷鍊� PLL 鍜� MMCM 妯″銆�
銆€銆€6. 閲囩敤 TSMC 鐨� 16nm FinFET 宸ヨ棟鍒堕€�锛岄’钁楅檷浣庝簡鍔熻€楀苟鎻愰珮浜嗘€ц兘銆�
銆€銆€7. 鍙€氶亷 Vivado 闁嬬櫦(f膩)宸ュ叿閫�(j矛n)琛岃ō(sh猫)瑷堝拰绶ㄧ▼锛岀啊鍖栭枊鐧�(f膩)娴佺▼銆�
銆€銆€8. 鏀寔澶氱ó閰嶇疆閬搁爡(xi脿ng)锛屽寘鎷緸闈炴槗澶辨€у瓨鍎插櫒鍟熷嫊鎴栭€氶亷 JTAG 绶ㄧ▼銆�

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XCKU035-2SFVA784I 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆€銆€1. 閫氫俊鍩虹(ch菙)瑷�(sh猫)鏂斤紝濡傜劇绶氬熀绔�銆佽矾鐢卞櫒鍜屼氦鎻涙(j墨)銆�
銆€銆€2. 楂樻€ц兘瑷堢畻绯荤当(t菕ng)涓殑鍗�(xi茅)铏曠悊鍣ㄦ垨鍔犻€熷櫒銆�
銆€銆€3. 閱�(y墨)鐧傛垚鍍忚ō(sh猫)鍌欎腑鐨勫湒鍍忚檿鐞嗗柈鍏�銆�
銆€銆€4. 宸ユキ(y猫)鑷嫊鍖栨帶鍒朵腑鐨勫(sh铆)鏅傛暩(sh霉)鎿�(j霉)閲囬泦鑸囪檿鐞�銆�
銆€銆€5. 鑸┖鑸ぉ鍜屽湅闃查牁(l菒ng)鍩熺殑淇¤櫉铏曠悊鑸囬浄閬�(d谩)绯荤当(t菕ng)銆�
銆€銆€6. 瑕栭牷寤ｆ挱鍜屾祦濯掗珨鍌宠几涓殑绶ㄧ⒓瑙ｇ⒓铏曠悊銆�
銆€銆€7. 鍚勭ó闇€瑕侀珮鍚炲悙閲忓拰浣庡欢閬茬殑鏁�(sh霉)鎿�(j霉)涓績鎳�(y墨ng)鐢ㄣ€�