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XCKU035-3FFVA1156E 鏄竴娆惧熀浜� Xilinx UltraScale 鏋舵(g貌u)鐨� FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪锛夎姱鐗�銆傝┎绯诲垪鍣ㄤ欢鏃ㄥ湪婊胯冻楂樻�ц兘銆佷綆鍔熻�楀拰楂橀泦鎴愬害鐨勯渶姹傦紝閬╃敤浜庨�氫俊銆佹暩(sh霉)鎿�(j霉)涓績鍔犻�熴�佸伐妤�(y猫)鎺у埗浠ュ強鑸┖鑸ぉ绛夐牁(l菒ng)鍩熺殑寰�(f霉)闆滆ō(sh猫)瑷�銆�
銆�銆�UltraScale 绯诲垪閫氶亷鍎�(y艒u)鍖栫殑鏋舵(g貌u)鎻愪緵浜嗗崜瓒婄殑绯荤当(t菕ng)鎬ц兘鍜岄潏娲荤殑 I/O 鏀寔锛屽悓鏅傚叿鍌欏挤(qi谩ng)澶х殑鏅傞悩绠＄悊鑳藉姏銆佸瓨鍎插櫒鎺ュ彛鏀寔浠ュ強 DSP 鐗囧姛鑳�銆�
鍨嬭櫉锛歑CKU035-3FFVA1156E
銆�銆�鏋舵(g貌u)锛歎ltraScale
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱� 35K CLB 鍒囩墖
銆�銆�DSP Slice 鏁�(sh霉)閲忥細2400
銆�銆�濉� RAM 鏁�(sh霉)閲忥細960
銆�銆�閰嶇疆闁冨瓨锛氫笉鍏�(n猫i)缃�
銆�銆�I/O 寮曡叧鏁�(sh霉)锛氭渶澶� 804
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆�銆�灏佽椤炲瀷锛欶FVA1156
銆�銆�渚涢浕闆诲锛氭牳蹇冮浕澹� 0.9V锛孖/O 闆诲 1.8V/2.5V/3.3V
XCKU035-3FFVA1156E 鎻愪緵浜嗗绋厛閫�(j矛n)鐗规�т互婊胯冻寰�(f霉)闆滅郴绲�(t菕ng)闇�姹傦細
銆�銆�1. 楂樻�ц兘瑷堢畻锛氶噰鐢� 20nm 鍒剁▼宸ヨ棟锛屾敮鎸侀珮閫熶俊铏熻檿鐞嗗強鏁�(sh霉)鎿�(j霉)鍚炲悙銆�
銆�銆�2. 闈堟椿鐨� I/O 鏀寔锛氭彁渚涘鍗�(xi茅)璀�銆佸彲閲嶆柊閰嶇疆鐨勬敹鐧�(f膩)鍣�锛岄�熺巼鏈�楂樺彲閬�(d谩) 28Gbps銆�
銆�銆�3. 鍏�(n猫i)缃瓨鍎插櫒璩囨簮锛氭搧鏈夎睈瀵岀殑濉� RAM 鍜屽垎甯冨紡 RAM 璩囨簮锛屼究浜庡鐝�(xi脿n)寰�(f霉)闆滅畻娉�銆�
銆�銆�4. 鍔熻�楀劒(y艒u)鍖栵細鍕曟厠(t脿i)鍔熻�楄(di脿o)绡�(ji茅)鎶�琛�(sh霉)鍏佽ū鏍规摎(j霉)璨�(f霉)杓夎(di脿o)鏁撮亱琛岄牷鐜囪垏闆诲銆�
銆�銆�5. 鍙潬鎬у寮�(qi谩ng)锛氬寘鎷尟瑾ゆ娓垏绯炬锛圗DC锛�銆侀厤缃綅娴佸姞瀵嗙瓑鍔熻兘锛岀⒑淇濇暩(sh霉)鎿�(j霉)瀹屾暣鎬у拰瀹夊叏鎬�銆�
銆�銆�6. 纭牳妯″鏀寔锛氬 PCIe Gen3銆佸崈鍏嗕互澶恫(w菐ng) MAC 绛夌‖ IP 鏍�锛岀啊鍖栭枊鐧�(f膩)娴佺▼骞堕檷浣庤ō(sh猫)瑷堥ⅷ(f膿ng)闅�銆�
XCKU035-3FFVA1156E 寤ｆ硾 閫氫俊鍩虹(ch菙)瑷�(sh猫)鏂斤細鐢ㄤ簬鍩虹珯銆佽矾鐢卞櫒鍜屼氦鎻涙(j墨)涓殑淇¤櫉铏曠悊銆�
銆�銆�2. 鏁�(sh霉)鎿�(j霉)涓績鍔犻�燂細浣滅偤鍗�(xi茅)铏曠悊鍣ㄥ煼(zh铆)琛屾(j墨)鍣ㄥ(xu茅)缈�(x铆)鎺ㄧ悊銆佹暩(sh霉)鎿�(j霉)鍒嗘瀽浠诲嫏(w霉)銆�
銆�銆�3. 宸ユキ(y猫)鑷嫊鍖栵細瀵︾従(xi脿n)寰�(f霉)闆滅殑瀵︽檪鎺у埗绠楁硶鍜屽湒鍍忚檿鐞�銆�
銆�銆�4. 閱�(y墨)鐧傝ō(sh猫)鍌欙細鏀寔楂樼簿搴︽垚鍍忓拰瑷烘柗鍎�鍣ㄣ��
銆�銆�5. 姹借粖闆诲瓙锛氱敤浜� ADAS锛堥珮绱氶椐涜紨鍔╃郴绲�(t菕ng)锛夊拰鑷嫊椐曢骞宠嚭涓殑鍌虫劅鍣ㄨ瀺鍚�銆�
銆�銆�6. 鑸┖鑸ぉ鑸囧湅闃诧細婊胯冻鍤�(y谩n)鑻涚挵(hu谩n)澧冧笅灏嶅彲闈犳�ц姹傞珮鐨勫祵鍏ュ紡瑷堢畻浠诲嫏(w霉)銆�
XCKU040-3FFVA1156E, XCKU060-3FFVA1156E
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