XCKU13P-L2FFVE900E 鏅�(sh铆)闁擄細2025/5/23 6:19:25 闁辫畝锛�23

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銆€銆€姝ゅ瀷铏�(h脿o)涓殑 XCKU13P 琛ㄧず鍏烽珨鐨� FPGA 鍣ㄤ欢椤炲瀷锛孡2 琛ㄧず閫熷害绛夌礆(j铆)锛孎(xi脿n)FVE900 琛ㄧず灏佽椤炲瀷鍜屽紩鑵虫暩(sh霉)锛孍琛ㄧず鍟嗘キ(y猫)绱�(j铆)婧害鑼冨湇锛�0掳C 鑷� 85掳C锛�銆�

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鍣ㄤ欢椤炲瀷锛欶PGA
銆€銆€绯诲垪锛欿intex UltraScale
銆€銆€閭忚集鍠厓鏁�(sh霉)閲忥細绱� 240K
銆€銆€DSP Slice 鏁�(sh霉)閲忥細2880
銆€銆€Block RAM 鏁�(sh霉)閲忥細1440KB
銆€銆€楂橀€熸敹鐧�(f膩)鍣ㄩ€熺巼锛氭渶楂� 16.3 Gbps
銆€銆€I/O 鏁�(sh霉)閲忥細1024
銆€銆€閰嶇疆妯″紡锛歋electMAP, Master/Slave SPI, BPI
銆€銆€灏佽椤炲瀷锛欶FVE900
銆€銆€宸ヤ綔婧害鑼冨湇锛�0掳C 鑷� 85掳C
銆€銆€闆绘簮闆诲锛氭牳蹇冮浕澹� 0.9V锛孖/O 闆诲 1.8V/2.5V/3.3V

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