鏅傞枔锛�2025/5/7 17:29:37
闁辫畝锛�25
XCKU3P-3SFVB784E 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Kintex UltraScale 绯诲垪 FPGA 鐨勪竴绋瀷铏熴�傝┎绯诲垪鐨� FPGA 閲囩敤 20nm 鍒堕�犲伐钘�锛屽叿鏈夐珮鎬ц兘銆佷綆鍔熻�楃殑鐗归粸锛岄仼鍚堢敤浜庨珮绔俊铏熻檿鐞�銆侀�氫俊绯荤当(t菕ng)銆佹暩(sh霉)鎿�(j霉)涓績鍔犻��銆佸湒鍍忚檿鐞嗕互鍙婂伐妤�(y猫)鎺у埗绛夋噳鐢ㄩ牁鍩�銆�
銆�銆�瑭茶姱鐗囨彁渚涗簡璞愬瘜鐨勯倧杓硣婧愬拰 DSP Slice锛屾敮鎸佸绋帴鍙ｅ崝(xi茅)璀帮紝鍚屾檪鍏峰倷寮峰ぇ鐨勫彲绶ㄧ▼鑳藉姏锛岃兘澶犳豢瓒冲京闆滆ō瑷堢殑闇�姹�銆�
鍨嬭櫉锛歑CKU3P-3SFVB784E
銆�銆�鍒剁▼宸ヨ棟锛�20nm
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱� 158K
銆�銆�DSP Slice 鏁�(sh霉)閲忥細1920
銆�銆�濉� RAM (KB)锛�6800
銆�銆�閰嶇疆闁冨瓨锛氫笉闆嗘垚
銆�銆�I/O 寮曡叧鏁�(sh霉)锛�520
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆�銆�灏佽椤炲瀷锛歋FVB784
XCKU3P-3SFVB784E 鎻愪緵浜嗗嚭鑹茬殑鎬ц兘鍜岄潏娲绘�с�傚畠鍏�(n猫i)缃簡 UltraRAM 鎶�琛�锛屽彲浠ラ’钁楁彁楂樼墖涓婂瓨鍎插櫒鐨勫埄鐢ㄧ巼鍜岃í鍟忛�熷害銆�
銆�銆�FPGA 涓泦鎴愪簡澶ч噺 DSP Slice锛屼娇寰楁暩(sh霉)瀛椾俊铏熻檿鐞嗕换鍕欐洿鐐洪珮鏁�锛岄仼鐢ㄤ簬闇�瑕侀珮瑷堢畻瀵嗗害鐨勬噳鐢ㄥ牬鏅��
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銆�銆�姝ゅ锛孹CKU3P-3SFVB784E 鏀寔鍕曟厠(t脿i)鍔熻兘鍒囨彌锛圖ynamically Partial Reconfiguration锛�锛屽厑瑷卞湪閬嬭鏅傞噸鏂板姞杓夐儴鍒嗛浕璺�锛屾彁楂樹簡绯荤当(t菕ng)鐨勯仼鎳夋�у拰鎿村睍鎬�銆�
瑭茶姱鐗囧唬娉涙噳鐢ㄤ簬澶氬�嬮牁鍩�锛屽寘鎷絾涓嶉檺浜庯細
銆�銆�1. 楂橀�熼�氫俊绯荤当(t菕ng)锛屽鍏夊偝杓哥恫(w菐ng)绲″拰鐒＄窔鍩虹珯銆�
銆�銆�2. 鏁�(sh霉)鎿�(j霉)涓績鍔犻�燂紝渚嬪娣卞害瀛哥繏鎺ㄧ悊銆佽闋昏綁(zhu菐n)纰煎拰鎼滅储绱㈠紩銆�
銆�銆�3. 閱�(y墨)鐧傛垚鍍忚ō鍌欎腑鐨勫鏅傚湒鍍忚檿鐞�銆�
銆�銆�4. 宸ユキ(y猫)鑷嫊鍖栨帶鍒剁郴绲�(t菕ng)涓殑楂樼礆绠楁硶瀵︾従(xi脿n)銆�
銆�銆�5. 姹借粖闆诲瓙涓殑闆烽仈鑸囧偝鎰熷櫒铻嶅悎銆�
銆�銆�XCKU3P-3SFVB784E 鐨勯珮甯跺銆佷綆寤堕伈鐗规�у拰寮峰ぇ鐨勫苟琛岃檿鐞嗚兘鍔涗娇鍏舵垚鐐洪�欎簺楂樻�ц兘鎳夌敤鐨勭悊鎯抽伕鎿�銆�
XCKU5P-3SFVB784E, XCKU7P-3SFVB784E
