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銆�銆�鍝佺墝锛歑ilinx
銆�銆�绯诲垪锛欿intex UltraScale
銆�銆�鍒剁▼宸ヨ棟锛�20nm
銆�銆�閭忚集鍠�鍏冩��(sh霉)锛氱磩 195K
銆�銆�DSP Slice 鏁�(sh霉)閲忥細2880
銆�銆�Block RAM 瀹归噺锛氱磩 13.2Mb
銆�銆�UltraRAM 瀹归噺锛氱磩 4.7Mb
銆�銆�PCIe 鏀�鎸侊細Gen3 x8
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銆�銆�I/O 鏁�(sh霉)閲忥細532
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銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +100掳C

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銆�銆�1. 楂樻�ц兘鏋舵��(g貌u)锛氶噰鐢� UltraScale 鏋舵��(g貌u)锛屾彁渚涙洿楂樼殑鏅�(sh铆)閻橀牷鐜囧拰鍎�(y艒u)鍖栫殑鏁�(sh霉)鎿�(j霉)璺�寰�锛岄’钁楁彁鍗囩郴绲�(t菕ng)鎬ц兘銆�
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