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銆�銆�閫欐鍣ㄤ欢閬╃敤浜庨渶瑕侀珮鎬ц兘瑷堢畻銆侀珮甯跺鏁�(sh霉)鎿�(j霉)鍌宠几浠ュ強寰╅洔閭忚集瀵︾従(xi脿n)鐨勫牬鏅�锛屽閫氫俊鍩虹瑷柦銆佹暩(sh霉)鎿�(j霉)涓績鍔犻��銆佸唬鎾闋昏檿鐞嗗拰楂樼礆闆烽仈绯荤当(t菕ng)绛�銆�
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銆�銆�鍙厤缃倧杓锛圕LB锛夛細53280
銆�銆�DSP Slice鏁�(sh霉)閲忥細6800
銆�銆�Block RAM瀹归噺锛氱磩52MB
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銆�銆�閰嶇疆妯″紡锛歋electMAP銆丮aster SPI銆丼lave SPI
銆�銆�I/O Bank鏁�(sh霉)閲忥細36
銆�銆�楂橀�熸敹鐧�(f膩)鍣ㄦ暩(sh霉)閲忥細48
銆�銆�鏀剁櫦(f膩)鍣ㄦ渶楂橀�熺巼锛�28.05Gbps
銆�銆�渚涢浕闆诲鑼冨湇锛氭牳蹇冮浕澹�0.9V锛岃紨鍔╅浕澹�1.0V/1.8V/2.5V
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銆�銆�鍏朵富瑕佺壒榛炲寘鎷細
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XCVU080-2FFVD1517E寤ｆ硾鎳夌敤浜庡皪鎬ц兘瑕佹眰妤甸珮鐨勯牁鍩燂細
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銆�銆�6. 鑸┖鑸ぉ锛氬弮鑸囧皫鑸�銆佸埗灏庡強鎺у埗绯荤当(t菕ng)鐨勯枊鐧�(f膩)锛屽悓鏅傛豢瓒冲毚鑻涚挵(hu谩n)澧冧笅鐨勫彲闈犳�ц姹�銆�
XCVU095-2FFVA2104E
銆�銆�XCVU095-2FFVD1517E
銆�銆�XCVU13P-2FFVC1517E
