鍨嬭櫉锛歑CVU095-1FFVD1517C
銆�銆�宸ヨ棟锛�16nm FinFET
銆�銆�鍏�(n猫i)鏍搁浕澹擄細0.85V
銆�銆�IO 闆诲�擄��1.2V/1.8V/2.5V/3.3V
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細绱� 95K
銆�銆�RAM 瀹归噺锛氱磩 6840 Kb
銆�銆�DSP Slice 鏁�(sh霉)閲忥細绱� 2340 鍊�
銆�銆�閰嶇疆妯″紡锛歋electMAP銆丮aster SPI銆丼lave SPI
銆�銆�灏佽�濋�炲瀷锛欶FVD1517
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +100掳C
銆�銆�I/O 寮曡叧鏁�(sh霉)閲忥細1517

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銆�銆�瑭茶姱鐗囨敮鎸侀珮閫熶覆琛屾敹鐧�(f膩)鍣�锛圙TY锛�锛屾暩(sh霉)鎿�(j霉)閫熺巼楂橀仈 32.75 Gbps锛岄仼鐢ㄤ簬鍚勭ó楂橀�熸帴鍙ｅ崝(xi茅)璀板�� PCIe Gen4銆丆PRI 鍜� Interlaken銆�
銆�銆�姝ゅ��锛屽畠閭勯泦鎴愪簡纭�鍖栫殑铏曠悊鍣ㄦā濉婏紙濡� ARM Cortex-A53 铏曠悊鍣�锛夌敤浜庡祵鍏ュ紡铏曠悊浠诲��(w霉)銆�
銆�銆�鍏朵綆鍔熻�楄ō(sh猫)瑷堜娇寰楀湪楂樻�ц兘瑷堢畻鏅備粛鐒朵繚鎸侀珮鏁堢殑鑳芥簮鍒╃敤鐜�銆�
銆�銆�鐐轰簡閬╂噳(y墨ng)澶氱ó鎳�(y墨ng)鐢ㄥ牬鏅�锛孹CVU095 閭勬彁渚涗簡闈堟椿鐨勯厤缃�閬搁爡鍜屽挤澶х殑瑾�(di脿o)瑭﹀姛鑳�锛屼究浜庨枊鐧�(f膩)浜哄摗蹇�閫熷�︾��(xi脿n)寰�(f霉)闆滅郴绲�(t菕ng)銆�

XCVU095-1FFVD1517C 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬闇�瑕侀珮瀵嗗害閭忚集铏曠悊鍜岄珮鎬ц兘閬嬬畻鐨勫牬鍚堬紝鍖呮嫭浣嗕笉闄愪簬锛�
銆�銆�1. 楂樼��閫氫俊瑷�(sh猫)鍌�锛屽�� 5G 鍩虹珯鍜屾牳蹇冪恫(w菐ng)闂�(gu膩n)銆�
銆�銆�2. 鏁�(sh霉)鎿�(j霉)涓�蹇冨姞閫熷崱锛岀敤浜庢�熷櫒瀛�(xu茅)缈�(x铆)鎺ㄧ悊鍜屽ぇ鏁�(sh霉)鎿�(j霉)鍒嗘瀽銆�
銆�銆�3. 楂樻�ц兘瑷堢畻 (HPC) 绯荤当(t菕ng)涓�鐨勫��(xi茅)铏曠悊鍣ㄣ��
銆�銆�4. 瑕栭牷寤ｆ挱闋�(l菒ng)鍩熺殑鍦栧儚铏曠悊鍜岀法纰艰В纰�銆�
銆�銆�5. 宸ユキ(y猫)鑷�鍕曞寲鎺у埗绯荤��(t菕ng)鐨勫�︽檪鏁�(sh霉)鎿�(j霉)閲囬泦鑸囪檿鐞嗐��
銆�銆�6. 閱�(y墨)鐧傛垚鍍忚ō(sh猫)鍌欎腑鐨勪俊铏熻檿鐞嗚垏鍦栧儚閲嶅缓銆�
銆�銆�7. 鑸�绌鸿埅澶╅��(l菒ng)鍩熺殑灏�(d菐o)鑸�鍜岄仚鎰熸��(sh霉)鎿�(j霉)铏曠悊銆�

XCVU095-2FFVD1517E
銆�銆�XCVU095-2FFVC1760E
銆�銆�XCVU095-2FFVC1760I