XCVU125-1FLVD1517I 鏅傞枔锛�2025/5/9 9:00:38 闁辫畝锛�32

XCVU125-1FLVD1517I 鏄敱 Xilinx锛堢従(xi脿n)鐐� AMD锛夌敓鐢�(ch菐n)鐨勪竴娆� UltraScale+ 绯诲垪 FPGA 鑺墖銆傝┎鍣ㄤ欢鍩轰簬 16nm FinFET 宸ヨ棟鎶€琛�(sh霉)锛屽叿鍌欓珮瀵嗗害閭忚集鍠厓銆佽睈瀵岀殑 DSP 妯″銆佸ぇ瀹归噺鐨勭墖涓婂瓨鍎插櫒浠ュ強楂橀€熸敹鐧�(f膩)鍣ㄨ硣婧�銆傚畠闈炲父閬╁悎鎳�(y墨ng)鐢ㄤ簬楂樼瑷堢畻銆佺恫(w菐ng)绲�(lu貌)铏曠悊銆佹暩(sh霉)鎿�(j霉)涓績鍔犻€熷拰宸ユキ(y猫)鑷嫊鍖栫瓑闋�(l菒ng)鍩�銆�
銆€銆€閫欐 FPGA 鎻愪緵浜嗗崜瓒婄殑鎬ц兘鍜岄潏娲绘€э紝鑳藉鏀寔寰�(f霉)闆滅殑瑷�(sh猫)瑷堥渶姹�锛屽苟涓旈泦鎴愪簡澶氶爡鍏堥€茬壒鎬т互鍎�(y艒u)鍖栧姛鑰楀拰淇¤櫉瀹屾暣鎬с€�

鍙冩暩(sh霉)

绯诲垪锛歎ltraScale+ VU
銆€銆€宸ヨ棟锛�16nm
銆€銆€FPGA 閭忚集鍠厓鏁�(sh霉)閲忥細绱� 125K
銆€銆€DSP Slice 鏁�(sh霉)閲忥細3200
銆€銆€Block RAM 瀹归噺锛氱磩 43.8MB
銆€銆€URAM 瀹归噺锛氱磩 20.8MB
銆€銆€鏀剁櫦(f膩)鍣ㄩ€熺巼锛氭渶楂橀仈 32.75Gbps
銆€銆€I/O 鏁�(sh霉)閲忥細澶氶仈 1517
銆€銆€灏佽椤炲瀷锛欶FG1517
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C

鐗规€�

XCVU125-1FLVD1517I 鍏峰倷浠ヤ笅涓昏鐗规€э細
銆€銆€1. 楂樺瘑搴﹀彲绶ㄧ▼閭忚集绲�(ji茅)妲�(g貌u)锛岄仼鍚堝鐝�(xi脿n)寰�(f霉)闆滅殑鏁�(sh霉)瀛楅浕璺姛鑳�銆�
銆€銆€2. 鍏�(n猫i)缃ぇ閲� DSP 妯″锛岄仼鐢ㄤ簬楂樻€ц兘瑷堢畻浠诲嫏(w霉)銆�
銆€銆€3. 澶у閲忕殑鐗囦笂瀛樺劜璩囨簮锛堝寘鎷� Block RAM 鍜� UltraRAM锛�锛屼究浜庢暩(sh霉)鎿�(j霉)绶╁瓨鑸囪檿鐞�銆�
銆€銆€4. 闆嗘垚楂橀€熶覆琛屾敹鐧�(f膩)鍣紝鍌宠几閫熺巼楂橀仈 32.75Gbps锛屾豢瓒崇従(xi脿n)浠ｉ€氫俊鍗�(xi茅)璀拌姹傘€�
銆€銆€5. 鏀寔澶氱ó鎺ュ彛妯�(bi膩o)婧�(zh菙n)锛屽 PCIe銆丆CIX銆丒thernet 绛�锛屾柟渚胯垏鍏朵粬瑷�(sh猫)鍌欎簰鑱�(li谩n)銆�
銆€銆€6. 浣庡欢閬叉灦妲�(g貌u)瑷�(sh猫)瑷�锛屾湁鍔╀簬鎻愬崌绯荤当(t菕ng)鏁撮珨闊挎噳(y墨ng)閫熷害銆�
銆€銆€7. 鍔熻€楃鐞嗘鍒跺厛閫�锛岃兘澶犲湪淇濊瓑鎬ц兘鐨勫悓鏅傛湁鏁堥檷浣庤兘鑰�銆�

鎳�(y墨ng)鐢�

瑭插瀷铏熺殑 FPGA 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆€銆€1. 鏁�(sh霉)鎿�(j霉)涓績鍔犻€熷崱锛岀敤浜庢鍣ㄥ(xu茅)缈�(x铆)鎺ㄧ悊銆佹暩(sh霉)鎿�(j霉)搴煡瑭㈠劒(y艒u)鍖栫瓑鍫存櫙銆�
銆€銆€2. 楂橀€熺恫(w菐ng)绲�(lu貌)浜ゆ彌姗熷拰璺敱鍣ㄧ殑鏍稿績铏曠悊妯″銆�
銆€銆€3. 瑕栭牷鍦栧儚铏曠悊瑷�(sh猫)鍌欎腑鐨勫鏅傜法瑙ｇ⒓鑸囧垎鏋愪换鍕�(w霉)銆�
銆€銆€4. 閱�(y墨)鐧傚奖鍍忚ō(sh猫)鍌欎腑鐨勫湒鍍忛噸寤鸿垏瑷烘柗绠楁硶鍔犻€�銆�
銆€銆€5. 宸ユキ(y猫)鎺у埗绯荤当(t菕ng)鐨勫鏅傛暩(sh霉)鎿�(j霉)閲囬泦鑸囩洠(ji膩n)鎺у姛鑳�銆�
銆€銆€6. 杌婅級闆烽仈鎴栨縺鍏夐浄閬旂殑鏁�(sh霉)鎿�(j霉)铻嶅悎鑸囩洰妯�(bi膩o)妾㈡脯閬嬬畻銆�
銆€銆€7. 绉戝(xu茅)鐮旂┒闋�(l菒ng)鍩熺殑妯℃摤浠跨湡鑸囧ぇ鏁�(sh霉)鎿�(j霉)铏曠悊浠诲嫏(w霉)銆�