XCVU125-3FLVB1760E 鏅�(sh铆)闁擄細2025/6/9 15:22:06 闁辫畝锛�1

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銆€銆€Virtex UltraScale 绯诲垪閲囩敤浜嗚嚭(t谩i)绌嶉浕 20nm 鍒剁▼宸ヨ棟锛屽湪鎬ц兘鍜屽姛鑰椾箣闁撳(sh铆)鐝�(xi脿n)浜嗚壇濂界殑骞宠　銆俋CVU125 鐗瑰畾鍨嬭櫉(h脿o)琛ㄧず鍏跺叿鍌欑磩 125K 鐨勯倧杓柈鍏冿紙Logic Cells锛�锛屽悓鏅�(sh铆) -3 妯�(bi膩o)蹇椾唬琛ㄩ€熷害绛夌礆(j铆)锛孎(xi脿n)LVB1760E 琛ㄧず灏佽椤炲瀷鍙婂紩鑵虫暩(sh霉)銆�

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閭忚集鍠厓鏁�(sh霉)閲忥細125940
銆€銆€DSP Slice 鏁�(sh霉)閲忥細6800
銆€銆€Block RAM 瀹归噺锛氱磩 32.2 Mb
銆€銆€UltraRAM 瀹归噺锛氱磩 8.5 Mb
銆€銆€PCIe 鏀寔锛欸en3 x8
銆€銆€鏀剁櫦(f膩)鍣ㄩ€熺巼锛氭渶楂橀仈(d谩) 28.05 Gbps
銆€銆€I/O 鏁�(sh霉)閲忥細鏈€澶� 1728
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆€銆€灏佽锛欶LVB1760E

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