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XCVU160-2FLGC2104E鏄疿ilinx鍏徃鎺ㄥ嚭鐨刅irtex UltraScale绯诲垪FPGA鑺墖涓殑涓�娆鹃珮鎬ц兘鍨嬭櫉銆傝┎鍣ㄤ欢鍩轰簬20nm宸ヨ棟鎶�琛撳埗閫�锛屽皥鐐洪珮甯跺銆佷綆寤堕伈鍜岄珮鎬ц兘瑷堢畻鎳夌敤瑷▓銆傚畠闆嗘垚浜嗗ぇ瑕�(gu墨)妯￠倧杓硣婧�銆侀珮閫熶覆琛屾敹鐧�(f膩)鍣�銆佸ぇ瀹归噺宓屽叆寮忓瓨鍎插櫒浠ュ強璞愬瘜鐨勬暩(sh霉)瀛椾俊铏熻檿鐞嗭紙DSP锛夋ā濉�锛岄仼鐢ㄤ簬閫氫俊鍩虹瑷柦銆佹暩(sh霉)鎿�(j霉)涓績鍔犻��銆佸湒鍍忚檿鐞�銆佽埅绌鸿埅澶╄垏鍦嬮槻绛夐牁鍩熺殑寰╅洔绯荤当(t菕ng)闁嬬櫦(f膩)銆�
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灏佽锛欶LGC2104
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銆�銆�鏈�澶у伐浣滈牷鐜囷細瓒呴亷500MHz
銆�銆�I/O寮曡叧鏁�(sh霉)锛�2104
銆�銆�渚涢浕闆诲锛氭牳蹇冮浕澹�0.9V锛岃紨鍔╅浕澹�1.8V/2.5V
銆�銆�鍔熻�楄寖鍦嶏細鏍规摎(j霉)鎳夌敤涓嶅悓锛屽吀鍨嬪嫊鎱�(t脿i)鍔熻�楀湪10W鑷�30W涔嬮枔
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
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XCVU160-2FLGC2104E鍏锋湁浠ヤ笅椤憲鐗规�э細
銆�銆�1. 楂樺瘑搴﹂倧杓祼(ji茅)妲�(g貌u)锛氭搧鏈夌磩160钀�嬮倧杓柈鍏�锛屾敮鎸佹サ鍏跺京闆滅殑鏁�(sh霉)瀛楅浕璺ō瑷�銆�
銆�銆�2. 楂橀�熶覆琛屾敹鐧�(f膩)鍣細闆嗘垚32鍊嬫渶楂橀仈28Gbps鐨凣TY鏀剁櫦(f膩)鍣紝鎻愪緵鍗撹秺鐨勬暩(sh霉)鎿�(j霉)鍌宠几鑳藉姏銆�
銆�銆�3. 澶у閲忓瓨鍎茶硣婧愶細鍖呭惈澶氶仈57Mb鐨凚lock RAM鍜�11Mb鐨刄ltraRAM锛岃兘澶犵珐瀛樺ぇ閲忔暩(sh霉)鎿�(j霉)浠ユ豢瓒抽珮鎬ц兘瑷堢畻闇�姹�銆�
銆�銆�4. DSP Slice锛氭彁渚涜秴閬�4600鍊嬮珮鎬ц兘DSP妯″锛屽皥闁�鐢ㄤ簬娴粸閬嬬畻鍙婄煩闄ｄ箻娉曠瓑浠诲嫏銆�
銆�銆�5. 鍏�(n猫i)缃‖鏍歌檿鐞嗗櫒锛氶儴鍒嗙増鏈敮鎸侀泦鎴怭owerPC寰檿鐞嗗櫒鎴朅RM Cortex-A53杌熸牳锛屽鐝�(xi脿n)鐗囦笂绯荤当(t菕ng)锛圫oC锛夊姛鑳姐��
銆�銆�6. 寮峰ぇ鐨勮矾鐢辨灦妲�(g貌u)锛氶噰鐢ㄩ珮绱氫簰閫ｇ恫(w菐ng)绲�锛岀⒑淇濋棞閸佃矾寰戜笂鐨勬檪搴忔敹鏂�銆�
銆�銆�7. 闈堟椿鐨勬檪閻樼鐞嗭細鍏峰倷PLL鍜孧MCM妯″锛屼究浜庣敓鎴愬悇绋牷鐜囧強鏅傞悩鐩镐綅鎺у埗銆�
銆�銆�8. 鍙潬鎬у寮凤細鏀寔绯鹃尟纰硷紙ECC锛�銆佸柈浜嬩欢缈昏綁(zhu菐n)锛圫EU锛夋娓垏淇京绛夊姛鑳�锛屾彁鍗囩郴绲�(t菕ng)鐨勭┅(w臎n)瀹氭�у拰鍙潬鎬�銆�
閫欐FPGA寤ｆ硾鎳夌敤浜庡鍊嬮牁鍩�锛屽寘鎷絾涓嶉檺浜庯細
銆�銆�1. 閫氫俊瑷倷锛氬5G鍩虹珯涓殑鍩哄付铏曠悊鍠厓銆佽矾鐢卞櫒浜ゆ彌鐭╅櫍绛�銆�
銆�銆�2. 鏁�(sh霉)鎿�(j霉)涓績锛氱敤浣滅恫(w菐ng)绲″姞閫熷崱鐨勬牳蹇冪祫浠�锛屽煼(zh铆)琛屾暩(sh霉)鎿�(j霉)鍖呭垎椤炪�佸姞瀵嗚В瀵嗙瓑浠诲嫏銆�
銆�銆�3. 瑕栭牷铏曠悊锛氭敮鎸侀珮娓呰闋荤法纰艰В纰笺�佸湒鍍忚瓨鍒ヤ互鍙婅▓绠楁瑕栬绠楁硶瀵︾従(xi脿n)銆�
銆�銆�4. 宸ユキ(y猫)鑷嫊鍖栵細妲�(g貌u)寤哄鏅傛帶鍒剁郴绲�(t菕ng)锛屼緥濡傞亱鍕曟帶鍒�銆佹鍣ㄤ汉鍗�(xi茅)瑾�(di脿o)鎿嶄綔銆�
銆�銆�5. 鑸┖鑸ぉ鑸囧湅闃诧細閬╃敤浜庨浄閬斾俊铏熻檿鐞�銆佽(w猫i)鏄熼�氫俊閺堣矾浠ュ強灏庤埅绯荤当(t菕ng)绛夊皪鐠�(hu谩n)澧冮仼鎳夋�ц姹傛サ楂樼殑鍫村悎銆�
XCVU13P-2FLGA2104E
銆�銆�XCVU11P-2FLGA2104E
