鍨嬭櫉锛歑CVU9P-L2FLGA2104E
銆�銆�鍒剁▼宸ヨ棟锛�16nm
銆�銆�FPGA 绯诲垪锛歎ltraScale+
銆�銆�灏佽�濋�炲瀷锛歀2FLGA
銆�銆�寮曡叧鏁�(sh霉)锛�2104
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細绱� 90 钀�鍊�
銆�銆�DSP Slice 鏁�(sh霉)閲忥細5800 鍊�
銆�銆�BRAM 鏁�(sh霉)閲忥細2760 鍊�
銆�銆�閰嶇疆闁冨瓨锛氫笉闆嗘垚澶栭儴閰嶇疆闁冨瓨
銆�銆�宸ヤ綔闆诲�擄細鏍稿績闆诲�� 0.85V锛孖/O 闆诲�� 1.8V/3.3V
銆�銆�涓茶�屾敹鐧�(f膩)鍣ㄩ�熺巼锛氭渶楂� 32.75Gbps
銆�銆�婧�搴﹁寖鍦嶏��-40掳C 鑷� +100掳C
銆�銆�鍏稿瀷鍔熻�楋細鏍规摎(j霉)鎳�(y墨ng)鐢ㄤ笉鍚岃�岃畩鍖�

XCVU9P-L2FLGA2104E 鐨勪富瑕佺壒鎬у寘鎷�锛�
銆�銆�1. 楂樻�ц兘鏋舵��(g貌u)锛氬熀浜� UltraScale+ 鎶�琛�(sh霉)锛屾彁渚涘崜瓒婄殑鏅傞悩闋荤巼鍜屽悶鍚愯兘鍔�銆�
銆�銆�2. 楂橀倧杓�瀵嗗害锛氬叿鍌欑�� 90 钀�鍊嬮倧杓�鍠�鍏冿紝閬╁悎寰�(f霉)闆滅殑鏁�(sh霉)瀛椾俊铏熻檿鐞嗕换鍕�(w霉)銆�
銆�銆�3. 澶ц��(gu墨)妯″瓨鍎茶硣婧愶細鍏�(n猫i)缃� 2760 鍊嬪�婄媭 RAM锛圔RAM锛夛紝鍙�鐢ㄤ簬鏁�(sh霉)鎿�(j霉)绶╁瓨鎴栨煡鎵捐〃绛夊姛鑳�銆�
銆�銆�4. 寮�(qi谩ng)澶х殑 DSP 鏀�鎸侊細闆嗘垚浜� 5800 鍊� DSP Slice锛岄仼鐢ㄤ簬娴�榛為亱绠楀拰鐭╅櫍瑷堢畻绛夋��(sh霉)瀛�(xu茅)瀵嗛泦鍨嬩换鍕�(w霉)銆�
銆�銆�5. 楂橀�熸帴鍙ｆ敮鎸侊細鏀�鎸� PCIe Gen4銆丆CIX 鍜� CXL 鍗�(xi茅)璀�锛屽彲瀵︾従(xi脿n)楂樻晥鐨勭郴绲�(t菕ng)浜掕伅(li谩n)銆�
銆�銆�6. 璞愬瘜鐨勫�栬��(sh猫)鏀�鎸侊細鏀�鎸� DDR4銆丩PDDR4 鍏�(n猫i)瀛樻帶鍒跺櫒锛屼互鍙婂�氱ó閫氫俊鍗�(xi茅)璀版帴鍙�銆�
銆�銆�7. 瀹夊叏鍔熻兘锛氭敮鎸� AES 鍜� SHA 鍔犲瘑绠楁硶锛屼繚闅滆ō(sh猫)瑷堢殑瀹夊叏鎬�銆�
銆�銆�8. 鍙�绶ㄧ▼鎬у拰闈堟椿鎬э細鍏佽ū鐢ㄦ埗鑷�瀹氱京纭�浠跺姛鑳斤紝閬╂噳(y墨ng)澶氱ó鎳�(y墨ng)鐢ㄥ牬鏅�闇�姹�銆�

XCVU9P-L2FLGA2104E 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 鏁�(sh霉)鎿�(j霉)涓�蹇冨姞閫燂細鐢ㄤ簬姗�(j墨)鍣ㄥ��(xu茅)缈�(x铆)鎺ㄧ悊銆佹暩(sh霉)鎿�(j霉)鍒嗘瀽鍜屽姞瀵嗚В瀵嗙瓑楂樻�ц兘瑷堢畻浠诲嫏(w霉)銆�
銆�銆�2. 缍�(w菐ng)绲�(lu貌)鍩虹��(ch菙)瑷�(sh猫)鏂斤細鍦ㄨ矾鐢卞櫒銆佷氦鎻涙��(j墨)鍜� 5G 鍩虹珯涓�浣滅偤鏍稿績铏曠悊鍣ㄤ娇鐢ㄣ��
銆�銆�3. 鍦栧儚鑸囪�栭牷铏曠悊锛氭敮鎸佸�︽檪鍦栧儚鍒嗘瀽銆佽�栭牷绶ㄧ⒓鍜岃В纰肩瓑鍔熻��銆�
銆�銆�4. 宸ユキ(y猫)鑷�鍕曞寲锛氱敤浜庢��(j墨)鍣ㄤ汉鎺у埗銆侀亱鍕曟帶鍒跺拰宸ユキ(y猫)鐗╄伅(li谩n)缍�(w菐ng)瑷�(sh猫)鍌�銆�
銆�銆�5. 閱�(y墨)鐧傝ō(sh猫)鍌欙細鎳�(y墨ng)鐢ㄤ簬閱�(y墨)瀛�(xu茅)鎴愬儚銆佷俊铏熼噰闆嗗拰铏曠悊绛夐牁(l菒ng)鍩�銆�
銆�銆�6. 姹借粖闆诲瓙锛氭敮鎸佽嚜鍕曢�曢�涖�侀珮绱氶�曢�涜紨鍔╃郴绲�(t菕ng)锛圓DAS锛変腑鐨勫偝鎰熷櫒铻嶅悎鍜屾暩(sh霉)鎿�(j霉)铏曠悊浠诲嫏(w霉)銆�

XCVU9P-FSGD2104-E
銆�銆�XCVU9P-FSFPA2104-E
銆�銆�XCVU9P-FLGA2104-E