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鎮ㄥソ锛屾杩庝締(l谩i)鍒扮董搴�(k霉)闆诲瓙甯傚牬(ch菐ng)缍�(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺(c猫)

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩�(g貌u)缍�(w菐ng) > IC鐧剧 > XCZU11EG-2FFVC1760I

XCZU11EG-2FFVC1760I 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2025/5/7 20:08:01 鏌ョ湅 闁辫畝锛�26

XCZU11EG-2FFVC1760I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Zynq UltraScale+ MPSoC 绯诲垪涓殑涓�鍊�(g猫)楂樼鍨嬭櫉(h脿o)銆傝┎鑺墖闆嗘垚浜� ARM 铏曠悊鍣ㄣ�佸彲绶ㄧ▼閭忚集鍜岃睈瀵岀殑澶栬ō(sh猫)鎺ュ彛锛岄仼鍚堢敤浜庡祵鍏ュ紡瑕栬銆佸伐妤�(y猫)鐗╄伅(li谩n)缍�(w菐ng)銆侀�氫俊浠ュ強姹借粖闆诲瓙绛夐牁(l菒ng)鍩熴�傚叾鏋舵(g貌u)瑷�(sh猫)瑷�(j矛)鏀寔瀵�(sh铆)鏅�(sh铆)铏曠悊鍜岄珮鎬ц兘瑷�(j矛)绠�锛屽悓鏅�(sh铆)鍏峰倷浣庡姛鑰楃壒鎬с��

鍙冩暩(sh霉)

绯诲垪锛歓ynq UltraScale+ MPSoC
銆�銆�鍨嬭櫉(h脿o)锛歑CZU11EG-2FFVC1760I
銆�銆�灏佽锛欶FVC1760
銆�銆�CPU锛氶洐鏍� ARM Cortex-A53 + 鍠牳 ARM Cortex-R5
銆�銆�FPGA 鏋舵(g貌u)锛歎ltraScale+
銆�銆�鍙法绋嬮倧杓細绱� 49.3K 閭忚集鍠厓
銆�銆�瀛樺劜(ch菙)鍣細楂橀仈(d谩) 28MB 宓屽叆寮� RAM
銆�銆�鏀剁櫦(f膩)鍣ㄩ�熺巼锛氭渶楂� 32.75Gbps
銆�銆�I/O 鏁�(sh霉)閲忥細鏈�澶� 1324 鍊�(g猫)鐢ㄦ埗 I/O
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C

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XCZU11EG-2FFVC1760I 鎻愪緵浜嗗挤(qi谩ng)澶х殑鐣版(g貌u)澶氳檿鐞嗗櫒绯荤当(t菕ng)闆嗘垚鑳藉姏锛屽寘鎷洐鏍� ARM Cortex-A53 鍜屽柈鏍� ARM Cortex-R5 铏曠悊鍣ㄣ�傚畠鍏锋湁闈堟椿鐨勫彲绶ㄧ▼閭忚集璩囨簮锛屽彲浠ュ(sh铆)鐝�(xi脿n)瀹氬埗鍖栫殑纭欢鍔犻�熷姛鑳�銆�
銆�銆�姝ゅ锛岃┎鑺墖鍏�(n猫i)缃珮閫熶覆琛屾敹鐧�(f膩)鍣紝鑳藉鏀寔 PCIe銆丆CIX 鍜屽绋崝(xi茅)璀版(bi膩o)婧�(zh菙n)銆傚叾璞愬瘜鐨勫瑷�(sh猫)鏀寔浣垮緱瀹冨彲浠ュ唬娉涙噳(y墨ng)鐢ㄤ簬宓屽叆寮忚瑕虹郴绲�(t菕ng)銆佸伐妤�(y猫)鑷嫊(d貌ng)鍖栨帶鍒�銆侀�氫俊鍩虹(ch菙)瑷�(sh猫)鏂藉缓瑷�(sh猫)浠ュ強 ADAS锛堥珮绱�(j铆)椐曢杓斿姪绯荤当(t菕ng)锛夌瓑鍫�(ch菐ng)鏅��
銆�銆�鍦ㄥ姛鑰楀劒(y艒u)鍖栨柟闈�锛孹CZU11EG-2FFVC1760I 鎻愪緵浜嗗嫊(d貌ng)鎱�(t脿i)闆绘簮绠＄悊鎶�琛�(sh霉)锛屽彲浠ユ牴鎿�(j霉)瀵�(sh铆)闅涢渶姹傝(di脿o)鏁村悇鍊�(g猫)妯″鐨勫伐浣滅媭鎱�(t脿i)浠ラ檷浣庢暣楂旇兘鑰椼��

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XCZU11EG-2FFVC1760I 涓昏鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 宓屽叆寮忚瑕猴細鏀寔楂樺垎杈ㄧ巼鍦栧儚铏曠悊鍜屽(sh铆)鏅�(sh铆)瑕栭牷鍒嗘瀽銆�
銆�銆�2. 宸ユキ(y猫)鐗╄伅(li谩n)缍�(w菐ng)锛氶仼鐢ㄤ簬寰�(f霉)闆滅殑宸ユキ(y猫)鎺у埗鍜岄倞绶ｈ▓(j矛)绠椾换鍕�(w霉)銆�
銆�銆�3. 閫氫俊瑷�(sh猫)鍌欙細鍙敤浜� 5G 鍩虹珯銆佺恫(w菐ng)绲�(lu貌)浜ゆ彌姗�(j墨)鍜屽叾浠栭�氫俊鍩虹(ch菙)瑷�(sh猫)鏂姐��
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鏇夸唬鍨嬭櫉(h脿o)

XCZU11EG-1FFVC1760E
銆�銆�XCZU11EG-1FFVC1760I
銆�銆�XCZU11ES-2FFVC1760I

xczu11eg-2ffvc1760i鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

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  • 渚涙噳(y墨ng)鍟�
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  • 寤犲晢
  • 灏佽/鎵硅櫉(h脿o)
  • 瑭㈠児(ji脿)

xczu11eg-2ffvc1760i璩囨枡 鏇村>

  • 鍨嬭櫉(h脿o)
  • 鎻忚堪
  • 鍝佺墝
  • 闁辫涓嬭級

xczu11eg-2ffvc1760i鍙冩暩(sh霉)

  • 鐝�(xi脿n)鏈夋暩(sh霉)閲�0鐝�(xi脿n)璨ㄦ煡鐪嬩氦鏈�
  • 鍍�(ji脿)鏍�1 : 锟�64,723.10000鎵樼洡
  • 绯诲垪Zynq? UltraScale+? MPSoC EG
  • 鍖呰鎵樼洡
  • 鐢�(ch菐n)鍝佺媭鎱�(t脿i)鍦ㄥ敭
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  • 闁冨瓨澶у皬-
  • RAM 澶у皬256KB
  • 澶栬ō(sh猫)DMA锛學DT
  • 閫ｆ帴鑳藉姏CANbus锛孍BI/EMI锛屼互澶恫(w菐ng)锛孖2C锛孧MC/SD/SDIO锛孲PI锛孶ART/USART锛孶SB OTG
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  • 涓昏灞��Zynq?UltraScale+? FPGA锛�653K+ 閭忚集鍠厓
  • 宸ヤ綔婧害-40掳C ~ 100掳C锛圱J锛�
  • 灏佽/澶栨1760-BBGA锛孎(xi脿n)CBGA
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