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鎮ㄥソ锛屾杩庝締(l谩i)鍒扮董搴�(k霉)闆诲瓙甯傚牬(ch菐ng)缍�(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺(c猫)

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩�(g貌u)缍�(w菐ng) > IC鐧剧 > XCZU15EG-1FFVB1156I

XCZU15EG-1FFVB1156I 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2025/4/29 14:02:23 鏌ョ湅 闁辫畝锛�32

XCZU15EG-1FFVB1156I 鏄竴娆剧敱 Xilinx 鍏徃鐢熺敘(ch菐n)鐨� Zynq UltraScale+ MPSoC 绯诲垪楂樼 FPGA 鑺墖銆傝┎绯诲垪绲�(ji茅)鍚堜簡瀵�(sh铆)鏅�(sh铆)鎺у埗鑸囧彲绶ㄧ▼閭忚集锛岄仼鐢ㄤ簬楂樻�ц兘宓屽叆寮忚▓(j矛)绠楀拰寰�(f霉)闆滅郴绲�(t菕ng)瑷�(sh猫)瑷�(j矛)銆�
銆�銆�閫欐鑺墖闆嗘垚浜嗗鏍� ARM 铏曠悊鍣ㄣ�佸彲绶ㄧ▼閭忚集鍠厓浠ュ強澶氱ó澶栬ō(sh猫)鎺ュ彛锛岄仼鍚堜簬闇�瑕侀珮鍚炲悙閲忋�佷綆寤堕伈鐨勬噳(y墨ng)鐢ㄥ牬(ch菐ng)鏅�銆傚畠寤ｆ硾鎳�(y墨ng)鐢ㄤ簬閫氫俊銆佸伐妤�(y猫)鑷嫊(d貌ng)鍖�銆侀啱(y墨)鐧傛垚鍍忋�佽埅绌鸿埅澶╁拰鍦�(gu贸)闃茬瓑闋�(l菒ng)鍩�銆�

鍙冩暩(sh霉)

鍨嬭櫉(h脿o)锛歑CZU15EG-1FFVB1156I
銆�銆�灏佽锛欶FVB1156
銆�銆�I/O 鏁�(sh霉)閲忥細248
銆�銆�瀛樺劜(ch菙)鍣ㄥぇ灏忥細2.3Mb
銆�銆�鍙法绋嬮倧杓柈鍏冿細~470K
銆�銆�铏曠悊鍣ㄦ灦妲�(g貌u)锛欰RM Cortex-A53 (Quad-core) + ARM Cortex-R5 (Dual-core)
銆�銆�鏅�(sh铆)閻橀牷鐜囷細鏈�楂樺彲閬�(d谩) 1GHz
銆�銆�鍔熻�楄寖鍦嶏細~5W 鑷� ~20W锛堣鍏烽珨閰嶇疆鑰屽畾锛�
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C

鐗规��

XCZU15EG-1FFVB1156I 鎻愪緵浜嗗挤(qi谩ng)澶х殑鐣版(g貌u)铏曠悊鑳藉姏锛屽叾涓昏鐗归粸(di菐n)鍖呮嫭锛�
銆�銆�1. 楂樻�ц兘 ARM Cortex-A53 鍥涙牳铏曠悊鍣ㄧ敤浜庨亱(y霉n)琛屾搷浣滅郴绲�(t菕ng)鍜岄珮绱�(j铆)鎳�(y墨ng)鐢�銆�
銆�銆�2. 瀵�(sh铆)鏅�(sh铆) ARM Cortex-R5 闆欐牳铏曠悊鍣ㄧ⒑淇濋棞(gu膩n)閸典换鍕�(w霉)鐨勭⒑瀹氭�у煼(zh铆)琛�銆�
銆�銆�3. 寮�(qi谩ng)澶х殑鍙法绋嬮倧杓崁(q奴)鍩熸敮鎸佺敤鎴惰嚜瀹氱京纭欢鍔犻�熷姛鑳姐��
銆�銆�4. 鍏�(n猫i)缃绋‖鏍稿瑷�(sh猫)妯″锛屽 PCIe Gen3銆乁SB 3.0銆丼ATA 鍜屽崈鍏嗕互澶恫(w菐ng)銆�
銆�銆�5. 鏀寔 LPDDR4銆丏DR4 鍏�(n猫i)瀛樻帶鍒跺櫒锛屾彁渚涢珮甯跺鏁�(sh霉)鎿�(j霉)鍌宠几鑳藉姏銆�
銆�銆�6. 鎻愪緵璞愬瘜鐨勮(di脿o)瑭﹀拰璺熻工宸ュ叿锛屼究浜庨枊鐧�(f膩)鍜岀董璀�(h霉)銆�
銆�銆�7. 鍏�(n猫i)缃姞瀵嗗紩鎿�锛屾敮鎸佸畨鍏ㄥ暉鍕�(d貌ng)鍜屾暩(sh霉)鎿�(j霉)淇濊(h霉)銆�

鎳�(y墨ng)鐢�

XCZU15EG-1FFVB1156I 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬澶氬��(g猫)闋�(l菒ng)鍩燂細
銆�銆�1. 鐒�(w煤)绶氶�氫俊鍩虹(ch菙)瑷�(sh猫)鏂�锛屽 5G 鍩虹珯銆佸皬鍨嬭渹绐╃恫(w菐ng)绲�(lu貌)銆�
銆�銆�2. 宸ユキ(y猫)鑷嫊(d貌ng)鍖栬ō(sh猫)鍌欙紝渚嬪 PLC 鎺у埗鍣ㄥ拰閬�(y霉n)鍕�(d貌ng)鎺у埗绯荤当(t菕ng)銆�
銆�銆�3. 閱�(y墨)鐧傚奖鍍忚ō(sh猫)鍌欙紝濡傝秴鑱叉尝姗�(j墨)銆丆T 鎺冩弿鍎�绛夈��
銆�銆�4. 姹借粖闆诲瓙锛岀壒鍒ユ槸 ADAS锛堥珮绱�(j铆)椐曢杓斿姪绯荤当(t菕ng)锛夊拰鑷嫊(d貌ng)椐曢鎶�琛�(sh霉)銆�
銆�銆�5. 鑸┖鑸ぉ鍙婂湅(gu贸)闃查牁(l菒ng)鍩�锛屼緥濡傞浄閬�(d谩)淇¤櫉(h脿o)铏曠悊鍜岃(w猫i)鏄熼�氫俊銆�
銆�銆�6. 閭婄罚瑷�(j矛)绠楀拰浜哄伐鏅鸿兘鎺ㄧ悊骞宠嚭(t谩i)銆�
銆�銆�7. 瑕栭牷铏曠悊鍜屽湒鍍忚瓨(sh铆)鍒ョ郴绲�(t菕ng)銆�

鏇夸唬鍨嬭櫉(h脿o)

XCZU15EV-1FFVB1156I
銆�銆�XCZU19EG-1FFVB1760E
銆�銆�XCZU11EG-1FFVC1156

xczu15eg-1ffvb1156i鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

  • 鐢�(ch菐n)鍝佸瀷铏�(h脿o)
  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉(h脿o)
  • 瑭㈠児(ji脿)

xczu15eg-1ffvb1156i鍙冩暩(sh霉)

  • 鐝�(xi脿n)鏈夋暩(sh霉)閲�0鐝�(xi脿n)璨ㄦ煡鐪嬩氦鏈�
  • 鍍�(ji脿)鏍�1 : 锟�47,073.12000鎵樼洡
  • 绯诲垪Zynq? UltraScale+? MPSoC EG
  • 鍖呰鎵樼洡
  • 鐢�(ch菐n)鍝佺媭鎱�(t脿i)鍦ㄥ敭
  • 鏋舵(g貌u)MCU锛孎(xi脿n)PGA
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  • 闁冨瓨澶у皬-
  • RAM 澶у皬256KB
  • 澶栬ō(sh猫)DMA锛學DT
  • 閫ｆ帴鑳藉姏CANbus锛孍BI/EMI锛屼互澶恫(w菐ng)锛孖2C锛孧MC/SD/SDIO锛孲PI锛孶ART/USART锛孶SB OTG
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  • 涓昏灞��Zynq?UltraScale+? FPGA锛�747K+ 閭忚集鍠厓
  • 宸ヤ綔婧害-40掳C ~ 100掳C锛圱J锛�
  • 灏佽/澶栨1156-BBGA锛孎(xi脿n)CBGA
  • 渚涙噳(y墨ng)鍟嗗櫒浠跺皝瑁�1156-FCBGA锛�35x35锛�