XCZU19EG-L1FFVE1924I 鏅傞枔锛�2025/5/7 21:29:16 闁辫畝锛�25

XCZU19EG-L1FFVE1924I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Zynq UltraScale+ MPSoC 绯诲垪涓殑涓€娆鹃珮绔姱鐗�銆傝┎绯诲垪铻嶅悎浜嗛珮鎬ц兘鐨� ARM 铏曠悊鍣ㄣ€佸彲绶ㄧ▼閭忚集浠ュ強璞愬瘜鐨勫瑷�(sh猫)鎺ュ彛锛岄仼鐢ㄤ簬闇€瑕侀珮瑷堢畻鑳藉姏鑸囬潏娲绘€х殑鎳�(y墨ng)鐢ㄥ牬鏅€俋CZU19EG 鐗瑰垾閬╁悎浜庢暩(sh霉)鎿�(j霉)涓績鍔犻€熴€佺恫(w菐ng)绲�(lu貌)閫氫俊銆佸祵鍏ュ紡瑕栬鍜屽伐妤�(y猫)鑷嫊鍖栫瓑闋�(l菒ng)鍩熴€�
銆€銆€瑭插瀷铏熼噰鐢� 16nm FinFET 宸ヨ棟鍒堕€�锛屽叿鍌欏挤(qi谩ng)澶х殑闆嗘垚搴﹀拰鑳芥晥姣斻€傚叾涓昏鐗归粸(di菐n)鏄皣闆欐牳 ARM Cortex-A53 鍜岄洐鏍� ARM Cortex-R5 铏曠悊鍣ㄨ垏 FPGA 鍙法绋嬮倧杓浉绲�(ji茅)鍚�锛屾敮鎸佸(sh铆)鏅傝檿鐞嗗拰纭欢鍔犻€熷姛鑳�銆�

鍙冩暩(sh霉)

宸ヨ棟锛�16nm
銆€銆€鍏�(n猫i)鏍革細ARM Cortex-A53锛堥洐鏍革級 + ARM Cortex-R5锛堥洐鏍革級
銆€銆€FPGA 鏋舵(g貌u)锛歎ltraScale+
銆€銆€鍙法绋嬮倧杓柈鍏冿細绱� 198K Logic Cells
銆€銆€瀛樺劜鍣細20.8MB Block RAM
銆€銆€DSP 妯″锛�2520 鍊�
銆€銆€I/O 鏁�(sh霉)閲忥細鏈€澶� 1924 鍊�
銆€銆€灏佽椤炲瀷锛欶FVE1924
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆€銆€鍔熻€楋細鍙栨焙浜庡叿楂旀噳(y墨ng)鐢�锛屽吀鍨嬪嫊鎱�(t脿i)鍔熻€� < 10W

鐗规€�

XCZU19EG 鎻愪緵浜嗛珮搴﹂潏娲荤殑鏋舵(g貌u)瑷�(sh猫)瑷�锛屽厑瑷辩敤鎴舵牴鎿�(j霉)闇€姹傞厤缃‖浠惰硣婧�銆傚畠鍏�(n猫i)缃殑 ARM Cortex-A53 鍏�(n猫i)鏍哥敤浜庨€氱敤瑷堢畻浠诲嫏(w霉)锛岃€� Cortex-R5 鍓囧皥娉ㄤ簬瀵�(sh铆)鏅傛帶鍒朵换鍕�(w霉)銆傛澶栵紝閫欐鑺墖閭勬敮鎸侊細
銆€銆€- 楂樺付瀵� DDR4 瀛樺劜鎺у埗鍣�
銆€銆€- 澶氶仈(d谩) 8 鍊� PCIe Gen3 閫氶亾
銆€銆€- 瑕栭牷绶ㄨВ纰煎姞閫熷紩鎿�
銆€銆€- 瀹夊叏鍟熷嫊鍔熻兘浠ヤ繚璀�(h霉)鐭ヨ瓨鐢�(ch菐n)娆�(qu谩n)
銆€銆€- 寮�(qi谩ng)澶х殑娴粸(di菐n)閬�(y霉n)绠楄兘鍔涢€氶亷 FPGA 璩囨簮瀵�(sh铆)鐝�(xi脿n)
銆€銆€- 鏀寔澶氱ó閫氫俊鍗�(xi茅)璀板 Gigabit Ethernet 鍜� USB 3.0
銆€銆€- 闆嗘垚 PMU锛堥浕婧愮鐞嗗柈鍏冿級纰轰繚浣庡姛鑰楅亱(y霉n)琛�

鎳�(y墨ng)鐢�

XCZU19EG-L1FFVE1924I 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆€銆€- 鏁�(sh霉)鎿�(j霉)涓績鍔犻€熷崱锛屾彁渚涢珮鏁堢殑骞惰瑷堢畻鑳藉姏
銆€銆€- 缍�(w菐ng)绲�(lu貌)閫氫俊瑷�(sh猫)鍌�锛屼緥濡傝矾鐢卞櫒銆佷氦鎻涙(j墨)鍜屽熀绔�
銆€銆€- 宓屽叆寮忚瑕虹郴绲�(t菕ng)锛屽寘鎷櫤鑳芥敐鍍忛牠鍜岃嚜鍕曢椐涜紨鍔�
銆€銆€- 宸ユキ(y猫)鑷嫊鍖栦腑鐨勯亱(y霉n)鍕曟帶鍒跺拰鏁�(sh霉)鎿�(j霉)閲囬泦
銆€銆€- 閱�(y墨)鐧傛垚鍍忚ō(sh猫)鍌欎腑鐨勫湒鍍忚檿鐞嗘ā濉�
銆€銆€- 浠讳綍闇€瑕侀珮鎬ц兘铏曠悊鑸囧彲瀹氬埗纭欢閭忚集绲�(ji茅)鍚堢殑鍫村悎