鏅傞枔锛�2025/4/30 17:21:51
闁辫畝锛�34
XCZU27DR-2FFVE1156E 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Zynq UltraScale+ MPSoC 绯诲垪涓殑涓�娆鹃珮绔� FPGA 鑺墖銆傝┎鑺墖闆嗘垚浜嗗彲绶ㄧ▼閭忚集銆佽檿鐞嗗櫒绯荤当(t菕ng)鍜岄珮鎬ц兘浜掗�ｏ紝閬╃敤浜庡京闆滅殑宓屽叆寮忕郴绲�(t菕ng)瑷�(sh猫)瑷�銆�
銆�銆�鍏舵牳蹇冨劒(y艒u)鍕㈠湪浜庡皣 ARM Cortex-A53 鍜� Cortex-R5 铏曠悊鍣ㄨ垏 FPGA 鍙法绋嬮倧杓浉绲�(ji茅)鍚�锛屾彁渚涘崜瓒婄殑闈堟椿鎬у拰鎬ц兘銆傞�欑ó鏋舵(g貌u)浣垮緱 XCZU27DR 鎴愮偤閫氫俊銆佸伐妤�(y猫)鎺у埗銆佹苯杌婇浕瀛愪互鍙婅埅绌鸿埅澶╃瓑闋�(l菒ng)鍩熺殑鐞嗘兂閬告搰銆�
绯诲垪锛歓ynq UltraScale+ MPSoC
銆�銆�鍨嬭櫉锛歑CZU27DR-2FFVE1156E
銆�銆�宸ヨ棟鍒剁▼锛�16nm
銆�銆�FPGA閭忚集鍠厓鏁�(sh霉)锛氱磩 249K
銆�銆�ARM铏曠悊鍣細闆欐牳 Cortex-A53 + 闆欐牳 Cortex-R5
銆�銆�瀛樺劜鍣細楂橀仈 10.8 Mb 宓屽叆寮忓瓨鍎插
銆�銆�鏀剁櫦(f膩)鍣ㄩ�熺巼锛氭渶楂� 32.75 Gbps
銆�銆�I/O寮曡叧鏁�(sh霉)锛�1156
銆�銆�灏佽椤炲瀷锛欶FVE
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
XCZU27DR-2FFVE1156E 鎻愪緵浜嗛珮搴﹂泦鎴愮殑鍔熻兘妯″锛岃兘澶犳豢瓒冲京闆滅郴绲�(t菕ng)鐨勫妯ｅ寲闇�姹�銆傚畠鍏锋湁寮峰ぇ鐨勮檿鐞嗚兘鍔�锛屽悓鏅傛敮鎸佸鏅傛帶鍒跺拰淇¤櫉铏曠悊浠诲嫏銆�
銆�銆�涓昏鐗归粸鍖呮嫭锛�
銆�銆�- 楂樻�ц兘 ARM Cortex-A53 铏曠悊鍣�锛岀敤浜庨亱琛屾搷浣滅郴绲�(t菕ng)鍜岄珮绱氭噳鐢ㄣ��
銆�銆�- Cortex-R5 瀵︽檪铏曠悊鍣�锛岀⒑淇濋棞(gu膩n)閸典换鍕欑殑鍙潬鎬у拰浣庡欢閬�銆�
銆�銆�- FPGA 鍙法绋嬮倧杓崁(q奴)鍩熸敮鎸佽嚜瀹氱京纭欢鍔犻��銆�
銆�銆�- 闆嗘垚璞愬瘜鐨勫瑷�(sh猫)鎺ュ彛锛屽 PCIe銆乁SB銆佷互澶恫(w菐ng)绛�銆�
銆�銆�- 鏀寔澶氱ó瀹夊叏鍔熻兘锛屽寘鎷姞瀵�銆佽獚璀夊拰瀹夊叏鍟熷嫊銆�
銆�銆�- 鎻愪緵闈堟椿鐨勯浕婧愮鐞嗛伕闋咃紝鍎�(y艒u)鍖栧姛鑰楄〃鐝�(xi脿n)銆�
銆�銆�- 寤ｆ硾鐨勫伐浣滄韩搴﹁寖鍦�锛岄仼鍚堟サ绔挵(hu谩n)澧冧笅鐨勯儴缃�銆�
閫欐鑺墖閬╃敤浜庡绋珮鎬ц兘鎳夌敤鍫存櫙锛屽寘鎷絾涓嶉檺浜庯細
銆�銆�- 閫氫俊鍩虹(ch菙)瑷�(sh猫)鏂斤細濡� 5G 鍩虹珯銆佺恫(w菐ng)绲�(lu貌)璺敱鍣ㄥ拰浜ゆ彌姗熴��
銆�銆�- 宸ユキ(y猫)鑷嫊鍖栵細渚嬪瀵︽檪鎺у埗绯荤当(t菕ng)銆佹鍣ㄤ汉鎺у埗鍣ㄥ拰宸ユキ(y猫)鐗╄伅(li谩n)缍�(w菐ng)瑷�(sh猫)鍌�銆�
銆�銆�- 姹借粖闆诲瓙锛氱敤浜� ADAS锛堥珮绱氶椐涜紨鍔╃郴绲�(t菕ng)锛夊拰鑷嫊椐曢骞宠嚭銆�
銆�銆�- 閱�(y墨)鐧傝ō(sh猫)鍌欙細濡傚奖鍍忚檿鐞嗚ō(sh猫)鍌欏拰渚挎敎寮忚ê鏂峰剙鍣ㄣ��
銆�銆�- 鑸┖鑸ぉ鍜屽湅闃诧細闆烽仈绯荤当(t菕ng)銆佽(w猫i)鏄熼�氫俊鍜屼换鍕欓棞(gu膩n)閸靛瀷瑷堢畻瑷�(sh猫)鍌欍��
銆�銆�鎲戝�熷叾鍑鸿壊鐨勬�ц兘鍜屽彲闈犳��锛孹CZU27DR 鎴愮偤閫欎簺闋�(l菒ng)鍩熶腑鐨勯閬歌В姹烘柟妗堜箣涓�銆�
XCZU28DR-2FFVE1156E
銆�銆�XCZU27DS-2FFVE1156E
