XCZU28DR-1FFVG1517E 鏅�(sh铆)闁擄細2025/5/30 22:51:42 闁辫畝锛�17

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銆€銆€閫欐 FPGA 涓嶅儏鍏峰倷寮�(qi谩ng)澶х殑纭欢鍔犻€熻兘鍔涳紝閭勬敮鎸佸绋帴鍙ｅ崝(xi茅)璀�锛岃兘澶犻潏娲绘噳(y墨ng)灏�(du矛)閫氫俊銆佸伐妤�(y猫)鑷嫊(d貌ng)鍖�銆佸祵鍏ュ紡瑕栬(ju茅)鍜屾苯杌�(ch膿)闆诲瓙绛夐牁(l菒ng)鍩熺殑闇€姹�銆�

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灏佽锛欶FVG1517
銆€銆€鏍稿績闆诲锛�0.85V
銆€銆€I/O 闆诲锛�1.8V/3.3V
銆€銆€閰嶇疆妯″紡锛歋PI/QSPI/BIOS
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆€銆€鍒剁▼宸ヨ棟锛�16nm
銆€銆€閭忚集鍠厓鏁�(sh霉)閲忥細绱� 358K
銆€銆€DSP Slice 鏁�(sh霉)閲忥細9360
銆€銆€RAM 璩囨簮锛氱磩 17MB
銆€銆€PS 閮ㄥ垎铏曠悊鍣細鍥涙牳 ARM Cortex-A53 鍜岄洐鏍� ARM Cortex-R5
銆€銆€PCIE 鎺ュ彛锛欸en3 x16
銆€銆€DDR 鏀寔锛欴DR4/LPDDR4

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XCZU28DR-1FFVG1517E 鐨勪富瑕佺壒鎬у寘鎷細
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