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鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫寸恫(w菐ng) 鐧婚寗 | 鍏嶈不娉ㄥ唺

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩肩恫(w菐ng) > IC鐧剧 > XCZU4EG-L2FBVB900E

XCZU4EG-L2FBVB900E 鐧�(f膩)甯冩檪闁� 鏅傞枔锛�2025/5/20 19:24:11 鏌ョ湅 闁辫畝锛�18

XCZU4EG-L2FBVB900E 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Zynq UltraScale+ MPSoC 绯诲垪涓殑楂樼 FPGA 鍣ㄤ欢銆傝┎绯诲垪鍣ㄤ欢闆嗘垚浜嗗彲绶ㄧ▼閭忚集銆佽檿鐞嗗櫒绯荤当(t菕ng)浠ュ強楂樻�ц兘鎺ュ彛锛岄仼鐢ㄤ簬闇�瑕侀珮瑷堢畻鑳藉姏銆佷綆寤堕伈鍜岄潏娲绘�х殑鎳�(y墨ng)鐢ㄥ牬鏅�銆傛鍨嬭櫉鍩轰簬 16nm FinFET 宸ヨ棟鎶�琛�(sh霉)鍒堕��锛屽叿鏈夊挤(qi谩ng)澶х殑鎬ц兘鍜屽姛鑰楀劒(y艒u)鍖栫壒鎬�銆�
銆�銆�XCZU4EG 灞簬 Zynq UltraScale+ MPSoC 鐨� eFGPA锛堝祵鍏ュ紡 FPGA锛夌郴鍒�锛屽叾瑷�(sh猫)瑷堟棬鍦ㄦ豢瓒冲祵鍏ュ紡瑕栬銆佸伐妤�(y猫)鑷嫊鍖�銆侀�氫俊鍩虹(ch菙)瑷�(sh猫)鏂藉拰姹借粖闆诲瓙绛夐牁(l菒ng)鍩熺殑寰�(f霉)闆滈渶姹傘��

鍙冩暩(sh霉)

鍨嬭櫉锛歑CZU4EG-L2FBVB900E
銆�銆�FPGA 鏋舵(g貌u)锛歓ynq UltraScale+
銆�銆�宸ヨ棟绡�(ji茅)榛烇細16nm
銆�銆�I/O 鏁�(sh霉)閲忥細374
銆�銆�瀛樺劜鍣ㄨ硣婧愶細512KB BRAM
銆�銆�DSP Slice 鏁�(sh霉)閲忥細800
銆�銆�CLB 鏁�(sh霉)閲忥細绱� 165,000
銆�銆�PS 閮ㄥ垎锛氬洓鏍� ARM Cortex-A53 + 闆欐牳 ARM Cortex-R5
銆�銆�eFPGA 闄ｅ垪澶�?銆傛澀s 42K Logic Cells
銆�銆�灏佽椤炲瀷锛欶BVB (Fine Pitch BGA)
銆�銆�灏佽灏哄锛�900 寮曡叧
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C

鐗规��

XCZU4EG-L2FBVB900E 鎻愪緵浜嗗崜瓒婄殑鎬ц兘鑸囬泦鎴愬害銆傚叾涓昏鐗规�у寘鎷細
銆�銆�1. 鍏�(n猫i)缃鏍歌檿鐞嗙郴绲�(t菕ng)锛屾敮鎸佸鏅傛搷浣滅郴绲�(t菕ng)鍙婇�氱敤鎿嶄綔绯荤当(t菕ng)閬�(y霉n)琛屻��
銆�銆�2. 楂樻�ц兘鍙法绋嬮倧杓儴鍒�锛岃兘澶�?q奴)宕縁(xi脿n)楂樺害瀹氬埗鍖栫殑纭欢鍔犻�熷姛鑳�銆�
銆�銆�3. 闆嗘垚楂橀�熶覆琛屾敹鐧�(f膩)鍣紝鍌宠几閫熺巼楂橀仈(d谩) 32.75Gbps锛屾豢瓒虫暩(sh霉)鎿�(j霉)瀵嗛泦鍨嬫噳(y墨ng)鐢ㄩ渶姹傘��
銆�銆�4. 鏀寔澶氱ó鎺ュ彛鍗�(xi茅)璀�锛屽 PCIe Gen3 x8銆乁SB 3.0銆丼ATA 鍜屽崈鍏嗕互澶恫(w菐ng)銆�
銆�銆�5. 鍔熻�楀劒(y艒u)鍖栬ō(sh猫)瑷�锛岄仼鍚堝皪鑳芥晥姣旇姹傝純楂樼殑鎳�(y墨ng)鐢ㄥ牬鏅��
銆�銆�6. 瀹夊叏鐗规�ц睈瀵�锛屽寘鎷� AES-256 鍔犲瘑銆丼HA-384 鍝堝笇绠楁硶鍜屼俊浠绘牴鍔熻兘锛屼繚闅滅郴绲�(t菕ng)瀹夊叏銆�
銆�銆�7. 鍏�(n猫i)缃ぇ瀹归噺鐗囦笂瀛樺劜鍣�锛屾笡灏戝皪澶栭儴瀛樺劜鐨勯渶姹傦紝寰炶�岀啊鍖栬ō(sh猫)瑷堝苟闄嶄綆鍔熻��銆�
銆�銆�8. 鏀寔鍕曟厠(t脿i)鍔熻兘鍒囨彌锛圖ynamically Reconfigurable锛�锛屽厑瑷遍儴鍒嗛噸鏂伴厤缃�锛屾彁楂樿硣婧愬埄鐢ㄧ巼銆�

鎳�(y墨ng)鐢�

XCZU4EG-L2FBVB900E 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 宓屽叆寮忚瑕虹郴绲�(t菕ng)锛屼緥濡傛(j墨)鍣ㄨ瑕�銆侀啱(y墨)鐧傚奖鍍忚檿鐞嗗拰瑕栭牷鐩�(ji膩n)鎺с��
銆�銆�2. 宸ユキ(y猫)鑷嫊鍖栨帶鍒�锛屽寘鎷(j墨)鍣ㄤ汉銆侀亱(y霉n)鍕曟帶鍒跺拰宸ユキ(y猫)鐗╄伅(li谩n)缍�(w菐ng)銆�
銆�銆�3. 閫氫俊鍩虹(ch菙)瑷�(sh猫)鏂�锛屽 5G 鍩虹珯銆佺恫(w菐ng)绲�(lu貌)浜ゆ彌瑷�(sh猫)鍌欏拰閭婄罚瑷堢畻骞宠嚭銆�
銆�銆�4. 姹借粖闆诲瓙锛岀敤浜庨珮绱氶椐涜紨鍔╃郴绲�(t菕ng)锛圓DAS锛夈�佷俊鎭妯傜郴绲�(t菕ng)鍜岃嚜鍕曢椐�銆�
銆�銆�5. 鑸┖鑸ぉ鑸囧湅闃�锛屾彁渚涢珮鎬ц兘瑷堢畻鍜屽彲闈犵殑瀹夊叏姗�(j墨)鍒�銆�
銆�銆�6. 閱�(y墨)鐧傝ō(sh猫)鍌�锛岀敤浜庤ê鏂峰剙鍣ㄣ�佹偅鑰呯洠(ji膩n)璀�(h霉)绯荤当(t菕ng)鍜屾墜琛�(sh霉)杓斿姪瑷�(sh猫)鍌�銆�

鏇夸唬鍨嬭櫉

XCZU5EV-FFVE1156E
銆�銆�XCZU7EV-FFVC1156E
銆�銆�XCZU9EG-FFVD1760E

xczu4eg-l2fbvb900e鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

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  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉
  • 瑭㈠児

xczu4eg-l2fbvb900e鍙冩暩(sh霉)

  • 鐝�(xi脿n)鏈夋暩(sh霉)閲�0鐝�(xi脿n)璨ㄦ煡鐪嬩氦鏈�
  • 鍍规牸1 : 锟�18,754.93000鎵樼洡
  • 绯诲垪Zynq? UltraScale+? MPSoC EG
  • 鍖呰鎵樼洡
  • 鐢�(ch菐n)鍝佺媭鎱�(t脿i)鍦ㄥ敭
  • 鏋舵(g貌u)MCU锛孎(xi脿n)PGA
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  • 闁冨瓨澶у皬-
  • RAM 澶у皬256KB
  • 澶栬ō(sh猫)DMA锛學DT
  • 閫ｆ帴鑳藉姏CANbus锛孍BI/EMI锛屼互澶恫(w菐ng)锛孖2C锛孧MC/SD/SDIO锛孲PI锛孶ART/USART锛孶SB OTG
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  • 灏佽/澶栨900-BBGA锛孎(xi脿n)CBGA
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