鏅傞枔锛�2025/4/29 9:14:58
闁辫畝锛�33
XCZU6EG-L1FFVB1156I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Zynq UltraScale+ MPSoC 绯诲垪涓殑涓�鍊嬮珮绔瀷铏�銆傝┎鑺墖闆嗘垚浜嗗彲绶ㄧ▼閭忚集锛團PGA锛夈�丄RM 铏曠悊鍣ㄥ拰澶氱ó灏堢敤纭欢鍔犻�熸ā濉�锛岄仼鐢ㄤ簬闇�瑕侀珮鎬ц兘瑷堢畻銆佸鏅傝檿鐞嗗拰闈堟椿纭欢閰嶇疆鐨勫京闆滅郴绲�(t菕ng)瑷▓銆傚叾涓昏鐩甯傚牬鍖呮嫭閫氫俊銆佸伐妤�(y猫)鑷嫊鍖栥�侀啱(y墨)鐧傝ō鍌�銆佹苯杌婇浕瀛愪互鍙婅埅绌鸿埅澶╄垏鍦嬮槻绛夐牁鍩�銆�
銆�銆�瑭插瀷铏熷熀浜� 16nm FinFET 宸ヨ棟鍒堕��锛屽叿鏈変綆鍔熻�楀拰楂橀泦鎴愬害鐨勭壒榛炪��
宸ヨ棟锛�16nm
銆�銆�鍏�(n猫i)鏍革細鍥涙牳 ARM Cortex-A53 + 闆欐牳 ARM Cortex-R5
銆�銆�鍙法绋嬮倧杓柈鍏冿細绱� 409,000 鍊嬮倧杓柈鍏�
銆�銆�DSP Slice 鏁�(sh霉)閲忥細2880
銆�銆�鍏�(n猫i)閮ㄥ瓨鍎插櫒锛�22.7 Mb BRAM
銆�銆�I/O 寮曡叧鏁�(sh霉)锛�1156
銆�銆�灏佽椤炲瀷锛欶FVB1156
銆�銆�TDP 鍔熻�楋細绱� 10W 鑷� 25W锛堟牴鎿�(j霉)浣跨敤鎯呮硜锛�
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
XCZU6EG-L1FFVB1156I 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 楂樻�ц兘铏曠悊鍣ㄥ瓙绯荤当(t菕ng)锛屽寘鍚洓鏍� ARM Cortex-A53 鍜岄洐鏍� ARM Cortex-R5锛岄仼鍚堥亱琛屾搷浣滅郴绲�(t菕ng)鍜屽鏅傛帶鍒朵换鍕�銆�
銆�銆�2. 寮峰ぇ鐨� FPGA 鏋舵锛屾敮鎸佺敤鎴惰嚜瀹氱京纭欢鍔犻�熸ā濉�銆�
銆�銆�3. 鍏�(n猫i)缃� GPU 鍜岃闋荤法瑙ｇ⒓鍠厓锛屾敮鎸� 4K 瑕栭牷铏曠悊銆�
銆�銆�4. 鎻愪緵澶氱ó楂橀�熸帴鍙�锛屽 PCIe Gen3銆乁SB 3.0銆丼ATA銆佸崈鍏嗕互澶恫(w菐ng)绛�銆�
銆�銆�5. 瀹夊叏鍟熷嫊鍔熻兘锛岀⒑淇濈郴绲�(t菕ng)鐨勫彲闈犳�у拰鎶楁敾鎿婅兘鍔涖��
銆�銆�6. 鏀寔 DDR4 鍏�(n猫i)瀛樻帶鍒跺櫒锛屾彁渚涢珮閬� 2400 Mbps 鐨勬暩(sh霉)鎿�(j霉)鍌宠几閫熺巼銆�
銆�銆�7. 闆嗘垚 PMU锛堥浕婧愮鐞嗗柈鍏冿級锛屽劒(y艒u)鍖栨暣楂斿姛鑰楄〃鐝�(xi脿n)銆�
銆�銆�8. 寤ｆ硾鐨勫伐浣滄韩搴﹁寖鍦嶄娇鍏堕仼鐢ㄤ簬鍚勭ó鑻涘埢鐠�(hu谩n)澧冧笅鐨勬噳鐢ㄣ��
銆�銆�瑭茶姱鐗囧湪闈堟椿鎬�銆佹�ц兘鍜屽姛鑰椾箣闁撳鐝�(xi脿n)浜嗗緢濂界殑骞宠 锛岄潪甯搁仼鍚堝京闆滅殑宓屽叆寮忕郴绲�(t菕ng)闁嬬櫦(f膩)銆�
XCZU6EG-L1FFVB1156I 寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊鍩虹瑷柦锛屽 5G 鍩虹珯銆佽矾鐢卞櫒鍜屼氦鎻涙銆�
銆�銆�2. 宸ユキ(y猫)鑷嫊鍖栵紝渚嬪姗熷櫒浜烘帶鍒剁郴绲�(t菕ng)鍜屽伐寤犵洠(ji膩n)鎺у钩鑷�銆�
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銆�銆�5. 鑸┖鑸ぉ鑸囧湅闃�锛屽琛�(w猫i)鏄熼�氫俊绯荤当(t菕ng)鍜岄浄閬斾俊铏熻檿鐞嗗柈鍏�銆�
銆�銆�6. 閭婄罚瑷堢畻鍜岀墿鑱�(li谩n)缍�(w菐ng)缍�(w菐ng)闂�锛屽鐝�(xi脿n)鏈湴鏁�(sh霉)鎿�(j霉)铏曠悊鍜屾櫤鑳芥焙绛栥��
銆�銆�鐢变簬鍏堕珮搴﹂泦鎴愮殑鐗规�у拰寮峰ぇ鐨勮▓绠楄兘鍔�锛岃┎鑺墖鑳藉婊胯冻澶氱ó楂樻�ц兘鎳夌敤鍫存櫙鐨勯渶姹�銆�
XCZU6CG-1FFVB1156I
銆�銆�XCZU7EV-2FFVB1156E
銆�銆�XCZU9EG-2FFVB1760E
