XQ6VLX240T-1FFG1156I 鏅�(sh铆)闁擄細2025/4/29 16:37:22 闁辫畝锛�26

XQ6VLX240T-1FFG1156I 鏄竴娆鹃珮鎬ц兘鐨� FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄ｅ垪锛夎姱鐗囷紝鐢� Xilinx 鍏徃鐢熺敘(ch菐n)銆傝┎鍨嬭櫉(h脿o)灞簬 Virtex-6 绯诲垪锛岄噰鐢ㄥ厛閫�(j矛n)鐨� 40nm 宸ヨ棟鍒堕€�锛岄仼鐢ㄤ簬楂樺京(f霉)闆滃害鍜岄珮瑷�(j矛)绠楅渶姹傜殑鎳�(y墨ng)鐢ㄥ牬(ch菐ng)鏅�銆傞€欐 FPGA 鎻愪緵浜嗚睈瀵岀殑閭忚集璩囨簮銆侀珮閫熶覆琛屾敹鐧�(f膩)鍣ㄤ互鍙婂祵鍏ュ紡瀛樺劜(ch菙)鍣ㄥ锛岄仼鍚堜簬閫氫俊銆佷俊铏�(h脿o)铏曠悊銆佸湒鍍忚檿鐞嗙瓑闋�(l菒ng)鍩熺殑瑷�(sh猫)瑷�(j矛)銆�
銆€銆€姝ゅ櫒浠舵敮鎸佸绋厤缃ā寮�锛屽寘鎷緸 Flash 鍟熷嫊(d貌ng)銆丣TAG 绶ㄧ▼浠ュ強涓�/寰� SPI 閰嶇疆绛�銆傛澶�锛屽畠閭勫叿鏈変綆鍔熻€楁ā寮忓拰鍕�(d貌ng)鎱�(t脿i)鍔熻€楃鐞嗗姛鑳�锛岃兘澶犳湁鏁堝劒(y艒u)鍖栫郴绲�(t菕ng)鐨勬暣楂旇兘鑰楄〃鐝�(xi脿n)銆�

鍙冩暩(sh霉)

閭忚集鍠厓锛�76800
銆€銆€閰嶇疆闁冨瓨锛氱劇(w煤)鍏�(n猫i)缃�
銆€銆€I/O 鏁�(sh霉)閲忥細532
銆€銆€鏅�(sh铆)閻樿硣婧愶細澶氶仈(d谩) 8 鍊�(g猫) PLL
銆€銆€闆绘簮闆诲锛�0.9V 鏍稿績锛�1.0V 杓斿姪锛�1.8V I/O
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆€銆€灏佽椤�(l猫i)鍨嬶細FFG1156

鐗规€�

XQ6VLX240T-1FFG1156I 鎻愪緵寮�(qi谩ng)澶х殑鎬ц兘鑸囬潏娲绘€э紝鍏峰倷浠ヤ笅涓昏鐗归粸(di菐n)锛�
銆€銆€1. 澶ц(gu墨)妯￠倧杓閲�锛屾豢瓒冲京(f霉)闆滅畻娉曞(sh铆)鐝�(xi脿n)鐨勯渶姹�銆�
銆€銆€2. 鏀寔楂橀仈(d谩) 6.5Gb/s 鐨� GTH 鏀剁櫦(f膩)鍣紝閬╃敤浜庨珮閫熸暩(sh霉)鎿�(j霉)鍌宠几鎳�(y墨ng)鐢�銆�
銆€銆€3. 鍏�(n猫i)宓� Block RAM 鍜� Distributed RAM锛岀敤浜庣珐瀛樺拰鏁�(sh霉)鎿�(j霉)铏曠悊銆�
銆€銆€4. 宓屽叆寮� DSP Slice锛屽彲浠ュ姞閫熸暩(sh霉)瀛�(xu茅)閬�(y霉n)绠楀涔樻硶绱姞鎿嶄綔銆�
銆€銆€5. 鍙€氶亷(gu貌)閮ㄥ垎閲嶉厤缃妧琛�(sh霉)锛屽湪閬�(y霉n)琛屾檪(sh铆)鏇存敼 FPGA 鐨勬煇浜涘崁(q奴)鍩熻€屼笉褰遍熆鍏朵粬閮ㄥ垎銆�
銆€銆€6. 鎻愪緵鍏ㄩ潰鐨勫畨鍏ㄥ姛鑳�锛屽寘鎷� AES 鍔犲瘑鍜� HMAC 瑾�(r猫n)璀�锛岀⒑淇� IP 鍜屾暩(sh霉)鎿�(j霉)淇濊(h霉)銆�
銆€銆€7. 闆嗘垚 PCI Express Endpoint 妯″锛屾柟渚块€ｆ帴鑷充富姗�(j墨)绯荤当(t菕ng)銆�

鎳�(y墨ng)鐢�

XQ6VLX240T-1FFG1156I 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬澶氬€�(g猫)闋�(l菒ng)鍩燂細
銆€銆€1. 閫氫俊鍩虹(ch菙)瑷�(sh猫)鏂�锛屼緥濡傜劇(w煤)绶氬熀绔�銆佽矾鐢卞櫒鍜屼氦鎻涙(j墨)涓殑鏁�(sh霉)鎿�(j霉)鍖呰檿鐞嗗拰鍗�(xi茅)璀拌綁(zhu菐n)鎻涖€�
銆€銆€2. 瑕栭牷鍜屽湒鍍忚檿鐞�锛屽寘鎷(sh铆)鏅�(sh铆)瑕栭牷绶ㄧ⒓瑙ｇ⒓銆佽▓(j矛)绠楁(j墨)瑕栬(ju茅)绠楁硶鍔犻€�銆�
銆€銆€3. 娓�(c猫)瑭︽脯(c猫)閲忚ō(sh猫)鍌�锛屽楂橀€熸暩(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)鍜屼俊铏�(h脿o)鐢熸垚鍣ㄣ€�
銆€銆€4. 閱�(y墨)鐧傛垚鍍忚ō(sh猫)鍌�锛屾敮鎸佸京(f霉)闆滅殑鍦栧儚閲嶅缓绠楁硶銆�
銆€銆€5. 宸ユキ(y猫)鑷嫊(d貌ng)鍖栨帶鍒�锛屾彁渚涘揩閫熼熆鎳�(y墨ng)鏅�(sh铆)闁撳拰楂樼簿搴﹂亱(y霉n)鍕�(d貌ng)鎺у埗銆�
銆€銆€6. 楂樻€ц兘瑷�(j矛)绠楀钩鑷�(t谩i)锛岀敤浣滃崝(xi茅)铏曠悊鍣ㄦ垨?q奴)锛崇硿?j矛)绠楀紩鎿�銆�