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EP1S25F780C7N 鏄� Altera 鍏徃锛堢従(xi脿n)鐐� Intel FPGA 閮ㄩ杸锛夋帹鍑虹殑 Stratix 绯诲垪 FPGA 鑺墖涓殑涓�娆俱�傝┎鍣ㄤ欢鍩轰簬 0.13 寰背宸ヨ棟鍒堕��锛屽叿鏈夐珮瀵嗗害閭忚集鍠厓銆佽睈瀵岀殑宓屽叆寮忓瓨鍎插櫒鍜� DSP 妯″锛岄仼鍚堢敤浜庨珮鎬ц兘瑷堢畻銆侀�氫俊绯荤当(t菕ng)銆佸湒鍍忚檿鐞嗕互鍙婂京闆滄帶鍒舵噳鐢ㄧ瓑銆�
銆�銆�Stratix 绯诲垪 FPGA 鐨勪富瑕佺壒榛炴槸鎻愪緵浜嗗挤澶х殑骞惰铏曠悊鑳藉姏鍜岄潏娲荤殑鏋舵瑷▓锛岃兘澶犳豢瓒冲京闆滅殑鏁�(sh霉)瀛椾俊铏熻檿鐞嗛渶姹�銆侲P1S25F780C7N 鎻愪緵浜� 25K 鍊嬮倧杓柈鍏�锛屽苟鏀寔澶氱ó I/O 妯欐簴锛岄仼鐢ㄤ簬闇�瑕侀珮闆嗘垚搴﹀拰楂樻�ц兘鐨勬噳鐢ㄥ牬鏅�銆�
鍨嬭櫉锛欵P1S25F780C7N
銆�銆�绯诲垪锛歋tratix I
銆�銆�鍒堕�犲晢锛欰ltera (鐝�(xi脿n) Intel FPGA)
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細25K
銆�銆�閰嶇疆闁冨瓨锛氱劇鍏х疆閰嶇疆闁冨瓨
銆�銆�I/O 鏁�(sh霉)閲忥細464
銆�銆�宸ヤ綔闆诲锛氭牳蹇冮浕澹� 1.5V锛孖/O 闆诲 1.8V/2.5V/3.3V
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銆�銆�鏈�澶у伐浣滈牷鐜囷細瓒呴亷 200 MHz
銆�銆�婧害鑼冨湇锛氬伐妤�(y猫)绱� (-40掳C 鑷� +85掳C)
銆�銆�宸ヨ棟绡�(ji茅)榛烇細0.13 寰背
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銆�銆�1. 楂樺瘑搴﹂倧杓柈鍏冿細鍖呭惈澶氶仈 25K 鍊嬮倧杓柈鍏�锛屽彲瀵︾従(xi脿n)寰╅洔鐨勬暩(sh霉)瀛楅浕璺ō瑷�銆�
銆�銆�2. 鍏у祵瀛樺劜鍣ㄦā濉婏細闆嗘垚浜嗗ぇ閲忕殑 RAM 鍜� ROM 鍠厓锛屾敮鎸佹暩(sh霉)鎿�(j霉)绶╁瓨鍜屾煡鎵捐〃鍔熻兘銆�
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EP1S25F780C7N 寤ｆ硾鎳夌敤浜庡鍊嬮牁鍩燂紝浠ヤ笅鏄叾鍏稿瀷鎳夌敤鍫存櫙锛�
銆�銆�1. 閫氫俊绯荤当(t菕ng)锛氬鐒＄窔鍩虹珯銆佽矾鐢卞櫒銆佷氦鎻涙绛夎ō鍌欎腑鐨勫崝(xi茅)璀拌檿鐞嗗拰鏁�(sh霉)鎿�(j霉)杞夌櫦(f膩)銆�
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EP1S25F780I7N
銆�銆�EP1S25F780C6N
