EP2AGX190FF35C3N 鏅�(sh铆)闁擄細2025/4/28 19:25:25 闁辫畝锛�35

EP2AGX190FF35C3N 鏄� Altera 鍏徃锛堢従(xi脿n)宸茶 Intel 鏀惰臣锛夋帹鍑虹殑涓€娆鹃珮鎬ц兘 FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪锛�銆傝┎鍣ㄤ欢灞簬 Arria GX 绯诲垪锛屼富瑕侀潰鍚戜腑绔噳(y墨ng)鐢ㄥ競鍫淬€侫rria GX 绯诲垪绲�(ji茅)鍚堜簡楂橀倧杓瘑搴�銆佸祵鍏ュ紡瀛樺劜鍣ㄥ拰 DSP 妯″锛屼互鍙婁覆琛屾敹鐧�(f膩)鍣�锛岄仼鐢ㄤ簬閫氫俊銆佸伐妤�(y猫)銆佸唬鎾拰杌嶄簨绛夐牁(l菒ng)鍩熺殑寰�(f霉)闆滆ō(sh猫)瑷�(j矛)銆�
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鍙冩暩(sh霉)

鍨嬭櫉锛欵P2AGX190FF35C3N
銆€銆€鍝佺墝锛欰ltera (Intel)
銆€銆€绯诲垪锛欰rria GX
銆€銆€灏佽锛欶F35 (Flip-Chip BGA)
銆€銆€I/O 鏁�(sh霉)閲忥細768
銆€銆€閰嶇疆瀛樺劜鍣ㄩ鍨嬶細EPCS16
銆€銆€閭忚集鍠厓鏁�(sh霉)閲忥細190,260
銆€銆€鏈€澶х敤鎴堕杻瀛樹綅锛�1,342,177
銆€銆€RAM 绺�?c猫)钀樻禋?,480 kbits
銆€銆€DSP 妯″鏁�(sh霉)閲忥細240
銆€銆€鏀剁櫦(f膩)鍣ㄩ€氶亾鏁�(sh霉)锛�12
銆€銆€鏀剁櫦(f膩)鍣ㄩ€熺巼鑼冨湇锛�375 Mbps 鑷� 6.375 Gbps
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C

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銆€銆€鍏舵锛岄€欐 FPGA 閰嶅倷浜嗗閬�(d谩) 190,260 鍊�(g猫)閭忚集鍠厓锛岄€欎娇寰楀畠鍙互瀹圭磵澶ц(gu墨)妯＄殑閭忚集闆昏矾瑷�(sh猫)瑷�(j矛)銆傚悓鏅�(sh铆)锛屽収(n猫i)缃殑 240 鍊�(g猫) DSP 妯″鐐烘暩(sh霉)瀛�(xu茅)閬�(y霉n)绠楁彁渚涗簡楂樻晥鐨勬敮鎸�锛屽挨鍏堕仼鍚堥渶瑕佸ぇ閲忔诞榛�(di菐n)鎴栧畾榛�(di菐n)閬�(y霉n)绠楃殑鎳�(y墨ng)鐢ㄥ牬鏅�銆�
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