鏅傞枔锛�2025/5/7 19:27:32
闁辫畝锛�23
EP2AGX190FF35I5N 鏄敱 Altera锛堢従(xi脿n)鐐� Intel FPGA 閮ㄩ杸锛夌敓鐢�(ch菐n)鐨勪竴娆鹃珮绔� Stratix II 绯诲垪 FPGA 鑺墖銆傝┎鑺墖閲囩敤鍏堥�茬殑 90nm 鍒剁▼宸ヨ棟锛岄泦鎴愪簡澶ч噺鐨勯倧杓柈鍏�銆佸祵鍏ュ紡瀛樺劜鍣ㄥ拰 DSP 妯″锛岄仼鐢ㄤ簬楂樻�ц兘瑷堢畻銆侀�氫俊绯荤当(t菕ng)銆佸湒鍍忚檿鐞嗗拰鍏朵粬寰╅洔鏁�(sh霉)瀛椾俊铏熻檿鐞嗛牁鍩�銆�
銆�銆�瑭插瀷铏熶腑鐨勫叿楂斿弮鏁�(sh霉)琛ㄦ槑鍏跺皝瑁濋鍨嬬偤 FF35锛團ineLine BGA 灏佽锛�锛屽伐浣滈�熷害绛夌礆鐐� I5锛屼笖鍏锋湁杓冮珮鐨勬�ц兘鍜屽彲闈犳��銆�
鍣ㄤ欢椤炲瀷锛欶PGA
銆�銆�绯诲垪锛歋tratix II
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱� 190K
銆�銆�閰嶇疆瀛樺劜鍣細M4K 鍜� M144K 濉�
銆�銆�I/O 鏁�(sh霉)閲忥細鏈�澶� 768 鍊�
銆�銆�鏅傞悩璩囨簮锛氬鍊嬪叏灞�鏅傞悩缍�(w菐ng)绲�
銆�銆�DSP 妯″锛氬閬� 360 鍊�
銆�銆�鏈�澶у伐浣滈牷鐜囷細瓒呴亷 300 MHz
銆�銆�渚涢浕闆诲锛氭牳蹇冮浕澹� 1.2V锛孖/O 闆诲鍙
銆�銆�灏佽椤炲瀷锛欶F35 (FineLine BGA)
銆�銆�宸ヤ綔婧害鑼冨湇锛氬伐妤�(y猫)绱氾紙-40掳C 鑷� +85掳C锛�
銆�銆�鍒剁▼宸ヨ棟锛�90nm
EP2AGX190FF35I5N 鍏锋湁浠ヤ笅椤憲鐗规�э細
銆�銆�1. 楂樺瘑搴﹂倧杓硣婧�锛岄仼鍚堝鐝�(xi脿n)寰╅洔鐨勭畻娉曞拰鏁�(sh霉)鎿�(j霉)璺緫銆�
銆�銆�2. 鍏х疆璞愬瘜鐨� DSP 妯″锛屽彲浠ラ珮鏁堝畬鎴愪箻娉曠疮鍔犻亱绠�锛岀壒鍒ラ仼鍚堥�氫俊鍜屼俊铏熻檿鐞嗘噳鐢ㄣ��
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銆�銆�4. 鏀寔澶氱ó楂橀�熸帴鍙ｆ婧�锛屼緥濡� PCIe銆丟bE 鍜� RocketIO 绛�锛屼究浜庢寤洪珮鎬ц兘浜掗�ｇ郴绲�(t菕ng)銆�
銆�銆�5. 鍏ч儴鏅傞悩绠＄悊鍠厓鏀寔鐩镐綅閹栧畾鐠�(hu谩n)璺紙PLL锛�锛岀⒑淇濈簿婧栫殑鏅傞悩鍒嗛厤鑸囧悓姝�銆�
銆�銆�6. 绱伴枔璺濈悆鏌甸櫍鍒楋紙FineLine BGA锛夊皝瑁濆舰寮忔彁渚涗簡鍎�(y艒u)鑹殑闆绘埃鎬ц兘鍜屾暎鐔辫兘鍔涖��
銆�銆�7. 鍙�氶亷 AS 鎴� JTAG 鏂瑰紡閫茶閰嶇疆锛屽苟鏀寔澶氶噸姣旂壒娴佸姞杓夊姛鑳戒互閬╂噳闈堟椿鐨勬噳鐢ㄥ牬鏅�銆�
EP2AGX190FF35I5N 涓昏鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 鐒＄窔閫氫俊鍩虹瑷柦锛屼緥濡傚熀绔欐敹鐧�(f膩)淇℃涓殑鍩哄付铏曠悊鍠厓銆�
銆�銆�2. 楂橀�熸暩(sh霉)鎿�(j霉)鍌宠几瑷倷锛屽璺敱鍣�銆佷氦鎻涙绛夌恫(w菐ng)绲＄敘(ch菐n)鍝�銆�
銆�銆�3. 瑕栭牷鍙婂湒鍍忚檿鐞嗚ō鍌欙紝鍖呮嫭瀵︽檪绶ㄧ⒓瑙ｇ⒓鍣ㄥ拰鍦栧舰鍔犻�熷崱銆�
銆�銆�4. 宸ユキ(y猫)鑷嫊鍖栨帶鍒剁郴绲�(t菕ng)鐨勯珮鎬ц兘鏁�(sh霉)鎿�(j霉)閲囬泦鑸囪檿鐞�銆�
銆�銆�5. 閱�(y墨)鐧傛垚鍍忚ō鍌欎腑闇�瑕佸揩閫熷苟琛岃▓绠楃殑浠诲嫏銆�
銆�銆�6. 鍦嬮槻杌嶅伐闋樺煙鐨勫姞瀵嗛�氫俊銆侀浄閬斾俊铏熻檿鐞嗙瓑鏂归潰銆�
EP2AGX190FF1100I5N, EP2AGX190F1517I5N
