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銆�銆�閫欐FPGA闆嗘垚浜嗗ぇ閲忓彲绶ㄧ▼閭忚集鍠厓銆丷AM妯″銆佷箻娉曞櫒鍜岄帠鐩哥挵(hu谩n)锛屽苟鏀寔澶氱óI/O妯欐簴銆傚畠閭勬彁渚涢珮閬�10.3 Gbps鐨勪覆琛屾敹鐧�(f膩)鍣ㄦ�ц兘锛岄仼鍚堥渶瑕侀珮甯跺鏁告摎鍌宠几鐨勬噳鐢ㄥ牬鏅�銆�
鍨嬭櫉锛欵P2S180F1020C4N
銆�銆�绯诲垪锛歋tratix II
銆�銆�宸ヨ棟锛�90nm
銆�銆�閭忚集鍠厓锛�182,016
銆�銆�宓屽叆寮忓瓨鍎插櫒锛�7.5 Mb (M4K RAM blocks)
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銆�銆�鏀剁櫦(f膩)鍣ㄩ�氶亾鏁搁噺锛�24
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銆�銆�灏佽锛欶BGA 1020
EP2S180F1020C4N鍏峰倷浠ヤ笅闂滈嵉鐗规�э細
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EP2S180F1020C4N寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
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EP2S180F1020I4N
銆�銆�EP2S180F1020C3N
