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鍨嬭櫉锛欵P4CE15F17A7N
銆€銆€鍝佺墝锛欰ltera/Intel FPGA
銆€銆€绯诲垪锛欳yclone IV E
銆€銆€灏佽锛欶BGA 361 Pin
銆€銆€I/O寮曡叧鏁�(sh霉)锛�228
銆€銆€閰嶇疆闁冨瓨锛氱劇鍏�(n猫i)缃厤缃杻瀛�
銆€銆€鍏�(n猫i)鏍搁浕澹擄細1.2V
銆€銆€I/O闆诲锛�1.8V/2.5V/3.3V
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆€銆€宸ヨ棟鍒剁▼锛�65nm
銆€銆€鍏�(n猫i)閮≧AM瀹归噺锛�399Kb
銆€銆€鍙法绋嬮倧杓柈鍏僉E鏁�(sh霉)閲忥細15K
銆€銆€DSP妯″鏁�(sh霉)閲忥細120

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