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EP4SGX180KF40C3N 鏄� Altera锛堢従(xi脿n)鐐� Intel FPGA锛夊叕鍙告帹鍑虹殑涓�娆� Stratix IV GX 绯诲垪鐨� FPGA 鑺墖銆傝┎绯诲垪鑺墖灏堢偤楂樻�ц兘銆侀珮瀵嗗害鎳夌敤鑰岃ō瑷�锛屽唬娉涙噳鐢ㄤ簬閫氫俊銆佺恫(w菐ng)绲°�佷俊铏熻檿鐞嗗拰瑷堢畻鍔犻�熺瓑闋樺煙銆侲P4SGX180KF40C3N 鎻愪緵浜嗚睈瀵岀殑閭忚集璩囨簮銆佸祵鍏ュ紡瀛樺劜鍣�銆丏SP 妯″浠ュ強楂橀�熸敹鐧�(f膩)鍣�锛岃兘澶犳豢瓒冲京闆滅郴绲�(t菕ng)瑷▓鐨勯渶姹�銆�
銆�銆�Stratix IV GX 绯诲垪閲囩敤浜嗗厛閫茬殑 40nm 鍒堕�犲伐钘濓紝鍏峰倷浣庡姛鑰楀拰楂樻�ц兘鐨勭壒榛�锛屽悓鏅傛敮鎸佸绋帴鍙ｆ婧栵紝濡� PCI Express銆乆AUI 鍜� CPRI 绛夈��
鍨嬭櫉锛欵P4SGX180KF40C3N
銆�銆�鍝佺墝锛欰ltera (Intel FPGA)
銆�銆�绯诲垪锛歋tratix IV GX
銆�銆�鍒剁▼锛�40nm
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱� 180K
銆�銆�RAM 绺藉閲忥細7.8Mb
銆�銆�DSP 妯″鏁�(sh霉)閲忥細576
銆�銆�鏈�澶х敤鎴� I/O 鏁�(sh霉)閲忥細820
銆�銆�楂橀�熸敹鐧�(f膩)鍣ㄩ�氶亾鏁�(sh霉)锛�24
銆�銆�鏀剁櫦(f膩)鍣ㄩ�熺巼鑼冨湇锛�375Mbps 鑷� 11.3Gbps
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆�銆�灏佽褰㈠紡锛欶BGA 1196
EP4SGX180KF40C3N 鍏峰倷浠ヤ笅椤憲鐗规�э細
銆�銆�1. 楂樻�ц兘鏋舵锛氶噰鐢� Stratix IV GX 鐨勫寮峰瀷鍙法绋嬮倧杓灦妲�锛屾敮鎸佸京闆滅殑绲勫悎閭忚集鍜屾檪搴忛倧杓姛鑳姐��
銆�銆�2. 鍏�(n猫i)缃‖鏍� IP锛氶泦鎴愪簡澶氬�嬬‖鏍告ā濉�锛屼緥濡� PCIe Gen2 纭牳銆佷互澶恫(w菐ng) MAC 鍜屽姞瀵嗘ā濉�锛岀啊鍖栦簡绯荤当(t菕ng)瑷▓骞舵彁楂樹簡鎬ц兘銆�
銆�銆�3. 楂橀�熶覆琛屾敹鐧�(f膩)鍣細鎻愪緵楂橀仈 11.3Gbps 鐨勬敹鐧�(f膩)鍣ㄩ�熺巼锛屾敮鎸佸悇绋妤�(y猫)妯欐簴鍗�(xi茅)璀�銆�
銆�銆�4. 璞愬瘜鐨� DSP 鏀寔锛氶厤鍌欏ぇ閲忕殑 DSP 妯″锛屾瘡鍊嬫ā濉婇兘鍖呭惈灏堢敤鐨勪箻娉曞櫒鍜屽姞娉曞櫒锛岄仼鍚堜俊铏熻檿鐞嗕换鍕�銆�
銆�銆�5. 鍙摯灞曟�ц垏闈堟椿鎬э細鏀寔鍕曟厠(t脿i)閲嶆柊閰嶇疆鎶�琛�锛屽厑瑷遍儴鍒嗛浕璺湪閬嬭鏅傞�茶鏇存柊鎴栦慨鏀广��
銆�銆�6. 浣庡姛鑰楀劒(y艒u)鍖栵細閫氶亷浣跨敤鍙畩绮惧害鏋舵鍜屾櫤鑳介浕婧愮鐞嗙瓥鐣ラ檷浣庢暣楂斿姛鑰�銆�
銆�銆�7. 宓屽叆寮忓瓨鍎插櫒璩囨簮锛氬寘鎷垎甯冨紡 RAM 鍜屽鐙� RAM锛岀敤浜庡鐝�(xi脿n)鏁�(sh霉)鎿�(j霉)绶╁瓨鍜屽叾浠栧瓨鍎查渶姹�銆�
銆�銆�姝ゅ锛岄�欐 FPGA 閭勫叿鏈夊挤澶х殑瑾�(di脿o)瑭﹀伐鍏烽張鏀寔锛屼究浜庨枊鐧�(f膩)浜哄摗閫茶瑷▓椹楄瓑鍜屽劒(y艒u)鍖�銆�
EP4SGX180KF40C3N 寤ｆ硾閬╃敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊鍩虹瑷柦锛氬鐒＄窔鍩虹珯銆佽矾鐢卞櫒銆佷氦鎻涙绛夎ō鍌欎腑鐨勬暩(sh霉)鎿�(j霉)鍖呰檿鐞嗗拰鍗�(xi茅)璀拌綁(zhu菐n)鎻涖��
銆�銆�2. 瑕栭牷鑸囧湒鍍忚檿鐞嗭細鐢ㄤ簬瀵︽檪瑕栭牷绶ㄧ⒓瑙ｇ⒓銆佸湒鍍忓寮峰拰妯″紡璀樺垾銆�
銆�銆�3. 瑷堢畻鍔犻�燂細浣滅偤鍗�(xi茅)铏曠悊鍣ㄥ姞閫熸暩(sh霉)鎿�(j霉)涓績涓殑鐗瑰畾绠楁硶閬嬬畻锛屼緥濡傚姞瀵嗚В瀵嗘垨鏁�(sh霉)鎿�(j霉)鍒嗘瀽銆�
銆�銆�4. 宸ユキ(y猫)鑷嫊鍖栵細瀵︾従(xi脿n)绮剧⒑閬嬪嫊鎺у埗銆佸伐妤�(y猫)缍�(w菐ng)绲′簰鑱�(li谩n)绛夊姛鑳姐��
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銆�銆�6. 娓│娓噺锛氱敤浣滈珮鎬ц兘娓│鍎�鍣ㄧ殑鏍稿績绲勪欢锛岃矤璨俊铏熺敓鎴愬拰鍒嗘瀽銆�
EP4SGX230KF40C3N
銆�銆�EP4SGX280KF40C3N
