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鎮ㄥソ锛屾杩庝締(l谩i)鍒扮董搴�(k霉)闆诲瓙甯傚牬(ch菐ng)缍�(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺(c猫)

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩�(g貌u)缍�(w菐ng) > IC鐧剧 > EP4SGX360FH29I4N

EP4SGX360FH29I4N 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2023/8/1 11:17:14 鏌ョ湅 闁辫畝锛�492

鐢�(ch菐n)鍝佹杩�

鐢�(ch菐n)鍝佸瀷铏�(h脿o)

EP4SGX360FH29I4N

鎻忚堪

闆嗘垚闆昏矾FPGA 289 I/O 780HBGA

鍒嗛

闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪)

鍒堕�犲晢

鑻辩壒鐖�

绯诲垪

Stratix?IV GX

鎵撳寘

鎵樼洡

闆朵欢鐙�鎱�(t脿i)

娲绘��

闆诲-闆绘簮

0.87V?0.93V

宸ヤ綔婧害

-40掳C?100掳C(TJ)

鍖呰/绠�

780-BBGA锛孎(xi脿n)CBGA

渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�

780-HBGA(33x33)

鍩烘湰闆朵欢铏�(h脿o)

EP4SGX360

鐢�(ch菐n)鍝佸湒鐗�

EP4SGX360FH29I4N

EP4SGX360FH29I4N

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鍙法绋嬮倧杓鍨�

鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪

绗﹀悎姝愮洘RoHS

鏄�

鐙�鎱�(t脿i)

杞�(zhu菐n)绉�

鏈�澶ф檪(sh铆)閻橀牷鐜�

717.0鍏嗚但

JESD-30浠ｇ⒓

S-PBGA-B780

JESD-609浠ｇ⒓

1铏�(h脿o)

绺絉AM浣�

23105536

CLB鏁�(sh霉)閲�

14144.0

杓稿叆鏁�(sh霉)閲�

289.0

閭忚集鍠厓鏁�(sh霉)

353600.0

杓稿嚭鏁�(sh霉)閲�

289.0

绔瓙鏁�(sh霉)

780

绲勭箶

14144 CLBS

宄板�煎洖娴佹韩搴�(鈩�)

245

闆绘簮

0.9,1.2 / 3,1.5,2.5

璩囨牸鐙�鎱�(t脿i)

涓嶅悎鏍�

搴ч珮

3.4姣背

瀛愰鍒�

鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪

闆绘簮闆诲妯�(bi膩o)绋�

0.9浼�

鏈�灏忎緵闆婚浕澹�

0.87浼�

鏈�澶ч浕婧愰浕澹�

0.93浼�

瀹夎椤炲瀷

琛ㄩ潰璨艰

鎶�琛�(sh霉)

CMOS

绲傜瀹屾垚

閷�/閵�/閵�(Sn / Ag / Cu)

绲傜琛ㄦ牸

鐞�

绔瓙闁撹窛

1.0姣背

绲傜浣嶇疆

搴曢儴

鏅�(sh铆)闁揁宄板�煎洖娴佹韩搴︽渶澶у��(绉�)

40

闀�(zh菐ng)搴�

33.0姣背

瀵害

33.0姣背

鍖呰涓婚珨鏉愭枡

濉戞枡/鐠�(hu谩n)姘фü鑴�

鍖呰浠ｇ⒓

BGA

鍖呰绛夋晥浠ｇ⒓

BGA780,28X28,40

鍖呰褰㈢媭

寤ｅ牬(ch菐ng)

鍖呰褰㈠紡

缍�(w菐ng)鏍奸櫍鍒�

鍒堕�犲晢鍖呰瑾�(shu艒)鏄�

33 X 33 MM锛岀劇(w煤)閴�锛孒BGA-780

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

鐒�(w煤)閴涚媭鎱�(t脿i)/RoHS鐙�鎱�(t脿i)

鐒�(w煤)閴�/绗﹀悎RoHS

姘村垎鏁忔劅鎬ф按骞�(MSL)

3(168灏忔檪(sh铆))

鐗归粸(di菐n)

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  • 鍏锋湁宓屽叆寮廝CIe纭琁P妯″鐨勫畬鏁碢CIe鍗�(xi茅)璀拌В姹烘柟妗�锛岄�欎簺妯″瀵�(sh铆)鐝�(xi脿n)PHY-MAC灞�锛屾暩(sh霉)鎿�(j霉)閺堣矾灞ゅ拰浜嬪嫏(w霉)铏曠悊灞ゅ姛鑳�

  • 7,370鑷�33,294 Kb鐨勫寮�(qi谩ng)鍨婽riMatrix瀛樺劜(ch菙)鍣�锛岀敱涓夌óRAM 濉婂ぇ灏忕祫鎴�锛屽彲瀵�(sh铆)鐝�(xi脿n)鐪熸鐨勯洐绔彛瀛樺劜(ch菙)鍣ㄥ拰FIFO绶╂矕鍗�(q奴)

  • 楂橀�熸暩(sh霉)瀛椾俊铏�(h脿o)铏曠悊(DSP)妯″锛屾渶楂樺彲閰嶇疆鐐�9 x 9浣�锛�12 x 12浣�锛�18 x 18浣嶅拰36 x 36浣嶅叏绮惧害涔樻硶鍣紝鏈�楂橀牷鐜囩偤600 MHz

  • 姣忓��(g猫)瑷�(sh猫)鍌欐渶澶�16鍊�(g猫)鍏ㄥ眬鏅�(sh铆)閻�(GCLK)锛�88鍊�(g猫)鍗�(q奴)鍩熸檪(sh铆)閻�(RCLK)鍜�132鍊�(g猫)澶栧湇鏅�(sh铆)閻�(PCLK)

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  • 鏀寔婧愬悓姝ョ附绶氭(bi膩o)婧�(zh菙n)锛屽寘鎷琒GMII锛孏bE锛孲PI-4 闅庢2(POS-PHY绱�(j铆)鍒�4)锛孲FI-4.1锛孹SBI锛孶TOPIA IV锛孨PSI鍜孋SIX-L1

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CAD妯″瀷

EP4SGX360FH29I4N绗﹁櫉(h脿o)

EP4SGX360FH29I4N绗﹁櫉(h脿o)

EP4SGX360FH29I4N鑵冲嵃

EP4SGX360FH29I4N鑵冲嵃

ep4sgx360fh29i4n鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

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  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉(h脿o)
  • 瑭㈠児(ji脿)

ep4sgx360fh29i4n鍦栫墖

ep4sgx360fh29i4n

ep4sgx360fh29i4n鍙冩暩(sh霉)

  • 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″Three Reasons to Use FPGA's in Industrial Designs
  • 妯�(bi膩o)婧�(zh菙n)鍖呰3
  • 椤炲垾闆嗘垚闆昏矾 (IC)
  • 瀹跺涵宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪锛�
  • 绯诲垪Stratix® IV GX
  • LAB/CLB鏁�(sh霉)14144
  • 閭忚集鍏冧欢/鍠厓鏁�(sh霉)353600
  • RAM 浣嶇附瑷�(j矛)23105536
  • 杓稿叆/杓稿嚭鏁�(sh霉)289
  • 闁�鏁�(sh霉)-
  • 闆绘簮闆诲0.87 V ~ 0.93 V
  • 瀹夎椤炲瀷琛ㄩ潰璨艰
  • 宸ヤ綔婧害-40°C ~ 100°C
  • 灏佽/澶栨780-BBGA 瑁搁湶鐒婄洡
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