鏅傞枔锛�2024/4/24 15:00:37
闁辫畝锛�215
MKE16Z64VLF4鎻愪緵楂橀仈(d谩)64 KB鐨勯杻瀛�銆侀珮閬�(d谩)8 KB鐨凴AM鍜屼竴鏁村妯℃摤/鏁�(sh霉)瀛楀姛鑳�锛岀偤宸ユキ(y猫)缍�(w菐ng)绲�(lu貌)鎻愪緵浜嗗挤澶х殑瑙告懜鎰熸噳(y墨ng)鎺ュ彛(TSI)鍜孋AN绺界窔锛屽湪瀹㈡埗鐨勫鐢ㄩ浕鍣ㄨЦ鎽窾I鍜屽伐妤�(y猫)鎺у埗绯荤当(t菕ng)涓彁渚涗簡楂樻按骞崇殑绌�(w臎n)瀹氭�у拰婧�(zh菙n)纰烘��銆�
銆�銆�鏍稿績铏曠悊鍣ㄥ強绯荤当(t菕ng)
銆�銆�Arm?Cortex?-M0+鏍稿績锛屾敮鎸侀珮閬�(d谩)48 MHz鐨勯牷鐜�
銆�銆�Arm Core鍩轰簬ARMv6鏋舵(g貌u)鍜�Thumb?-2 ISA
銆�銆�鍙厤缃祵濂楃煝閲忎腑鏂锋帶鍒跺櫒(NVIC)
銆�銆�鍏�(n猫i)瀛樻槧灏勯櫎娉曞拰骞虫柟鏍规ā濉�(MMDVSQ)
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銆�銆�CRC (Cyclic Redundancy Check)鐢熸垚妯″
銆�銆�128浣嶅敮涓�妯�(bi膩o)璀�(ID)铏熺⒓
銆�銆�鍏�(n猫i)閮ㄧ湅闁�鐙�(WDOG)锛屽叿鏈夌崹绔嬫檪閻樻簮
銆�銆�澶栭儴鐪嬮杸鐙楃洠(ji膩n)瑕栧櫒(EWM)妯″
銆�銆�ADC鑷牎婧�(zh菙n)鍔熻兘
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銆�銆�闆绘簮绠＄悊
銆�銆�浣庡姛鑰�Arm Cortex-M0+鏍稿績锛屽叿鏈夊嚭鑹茬殑鑳芥簮鏁堢巼
銆�銆�澶氬�嬮浕婧愮鐞嗘帶鍒跺櫒(PMC)
銆�銆�闆绘簮妯″紡:閬嬭銆佺瓑寰呫�佸仠姝�銆�VLPR銆�VLPW鍜�VLPS
| 鍟嗗搧鍒嗛 | MCU寰帶鍒跺櫒 | 鍝佺墝 | NXP(鎭╂櫤娴�) |
| 灏佽 | LQFP-48 | 鍖呰 | 鎵樼洡 |
| 鏍稿績铏曠悊鍣� | ARM Cortex-M0+ | 鍏�(n猫i)鏍歌(gu墨)鏍� | 32-浣� |
| 閫熷害 | 48MHz | 閫ｆ帴鑳藉姏 | CANbus锛孖2C锛孲PI锛孶ART/USART |
| 澶栬ō(sh猫) | DMA锛孡VD锛孭OR锛孭WM锛學DT | I/O鏁�(sh霉) | 42 |
| 绋嬪簭瀛樺劜瀹归噺 | 64KB锛�64K x 8锛� | 绋嬪簭瀛樺劜鍣ㄩ鍨� | 闁冨瓨 |
| EEPROM瀹归噺 | - | RAM澶у皬 | 8K x 8 |
| 闆诲-渚涢浕(Vcc/Vdd) | 2.7V ~ 5.5V | 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒 | A/D 12x12b; D/A 1x8b |
| 鎸暕鍣ㄩ鍨� | 鍏�(n猫i)閮� | 宸ヤ綔婧害 | -40掳C ~ 105掳C锛圱A锛� |
| 瀹夎椤炲瀷 | 琛ㄩ潰璨艰鍨� | 鍩烘湰鐢�(ch菐n)鍝佺法铏� | MKE16Z64 |
| HTSUS | 8542.31.0001 | 鐢�(ch菐n)鍝佹噳(y墨ng)鐢� | - |
| 婵曟埃鏁忔劅鎬х瓑绱�(MSL) | 3锛�168 灏忔檪锛� | ECCN | 3A991A2 |
| REACH鐙�鎱�(t脿i) | 闈� REACH 鐢�(ch菐n)鍝� |
MKE16Z64VLF4鍘熺悊鍦�
MKE16Z64VLF4寮曡叧鍦�
IC鍨嬭櫉绱㈠紩锛� A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9
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