鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫寸恫(w菐ng)
鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺
鏅傞枔锛�2024/5/6 16:30:34
闁辫畝锛�267
銆�銆�鎿嶄綔鐗归粸(di菐n)
銆�銆�鈥旈浕澹撹寖鍦�3v ~ 3.6 V
銆�銆�鈥旀韩搴﹁寖鍦�(鐠�(hu谩n)澧�)-40鈩儈 85鈩�
銆�銆�ARMCortexA5鏍稿績鍔熻兘
銆�銆�-楂橀仈(d谩)500 MHz ARM Cortex A5
銆�銆�鈥�32kb / 32kb I/D L1 Cache
銆�銆�鈥斿熀浜嶢RMv7鏋舵(g貌u)鐨�1.6 DMIPS/MHz
銆�銆�NEONMPE(濯掗珨铏曠悊寮曟搸)鍗�(xi茅)铏曠悊鍣�
銆�銆�-闆欑簿搴︽诞榛�(di菐n)鍠厓
銆�銆�- 512 KB L2绶╁瓨(鍍呴仼鐢ㄤ簬閬稿畾鐨勯儴浠惰櫉)
銆�銆�ARM Cortex M4 Core鍔熻兘
銆�銆�-楂橀仈(d谩)167 MHz ARM Cortex M4
銆�銆�-闆嗘垚DSP鑳藉姏
銆�銆�鈥�64kb TCM (tight Coupled Memory)
銆�銆�鈥�16kb / 16kb I/D L1 Cache
銆�銆�鈥�1.25 DMIPS/MHz锛屽熀浜嶢RMv7鏋舵(g貌u)
銆�銆�鏅傞悩
銆�銆�- 24 MHz鏅堕珨鎸暕鍣�
銆�銆�- 32鍗冭但鏅堕珨鎸暕鍣�
銆�銆�-鍏�(n猫i)閮ㄥ弮鑰冩檪閻�(128khz鍜�24mhz)
銆�銆�-閹栫浉鐠�(hu谩n)(PLLs)
銆�銆�-浣庢姈鍕曟暩(sh霉)瀛楅帠鐩哥挵(hu谩n)
| 鍟嗗搧鍒嗛 | 寰檿鐞嗗櫒 | 鍝佺墝 | NXP(鎭╂櫤娴�) |
| 灏佽 | 364-LFBGA锛�17x17锛� | 鍖呰 | 鎵樼洡 |
| 鏍稿績铏曠悊鍣� | ARM Cortex-A5 + Cortex-M4 | 鍏�(n猫i)鏍告暩(sh霉)/绺界窔瀵害 | 2 锛�32 浣� |
| 閫熷害 | 500MHz锛�167MHz | 鍗�(xi茅)铏曠悊鍣�/DSP | 澶氬獟楂�锛汵EON MPE |
| RAM鎺у埗鍣� | LPDDR2锛孌DR3锛孌RAM | 鍦栧舰鍔犻�� | 鏄� |
| 椤ず鑸囨帴鍙ｆ帶鍒跺櫒 | DCU锛孏PU锛孡CD锛孷ideoADC锛孷IU | 浠ュお缍�(w菐ng) | 10/100Mbps锛�2锛� |
| SATA | - | USB | USB 2.0 OTG + PHY锛�1锛� |
| 闆诲-I/O | 3.3V | 宸ヤ綔婧害 | -40掳C ~ 85掳C锛圱A锛� |
| 瀹夊叏鐗规�� | - | 闄勫姞鎺ュ彛 | CAN锛孖2C锛孖rDA锛孡IN锛孲CI锛孲DHC锛孲PI锛孶ART/USART |
| 鍩烘湰鐢�(ch菐n)鍝佺法铏� | MVF60 | HTSUS | 8542.31.0001 |
| 鐢�(ch菐n)鍝佹噳(y墨ng)鐢� | 宸ユキ(y猫)绱� |
| RoHS鐙�鎱�(t脿i) | 绗﹀悎 ROHS3 瑕�(gu墨)鑼� | 婵曟埃鏁忔劅鎬х瓑绱�(MSL) | 3锛�168 灏忔檪锛� |
| REACH鐙�鎱�(t脿i) | 闈� REACH 鐢�(ch菐n)鍝� | ECCN | 3A991A2 |
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