銆�銆�鏍稿績:Arm32浣岰ortex-M7 CPU鑸嘑PU锛岃嚜閬╂噳(y墨ng)瀵�(sh铆)鏅�(sh铆)鍔犻�熷櫒(ART Accelerator)鍜孡1-cache: 4kbyte鏁�(sh霉)鎿�(j霉)绶╁瓨鍜�4-Kbyte鎸囦护绶╁瓨锛屽厑瑷卞緸宓屽叆寮廎lash鍩�(zh铆)琛�0-wait鐙�鎱�(t脿i)瑷樻喍鑸囧閮ㄨ鎲�锛岄牷鐜囦笂鍗囧埌216mhz, MPU锛�462 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1)锛屽拰DSP鎸囦护銆�
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銆�銆�鈥旂偤RTC鎻愪緵VBAT, 32脳32-bit鍌欎唤瀵勫瓨鍣�+ 4kbytes鐨勫倷浠絊RAM
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銆�銆�-澶氶仈(d谩)4脳 I2C鎺ュ彛(SMBus/PMBus)
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銆�銆�- 2鍊�(g猫)SAIs(涓茶闊抽牷鎺ュ彛)
銆�銆�- 2 脳 CANs (2.0B鏈夋簮)鍜孲DMMC鎺ュ彛
鏅�(sh铆)闁擄細2024/4/29 16:54:05
闁辫畝锛�198
