鏅傞枔锛�2025/5/19 11:04:02
闁辫畝锛�19
XA7A15T-1CPG236Q 鏄竴娆剧敱 Xilinx 鍏徃鐢熺敘(ch菐n)鐨� Artix-7 绯诲垪 FPGA 鑺墖锛屽爆浜庨珮鎬ц兘銆佷綆鍔熻�楃殑 FPGA 骞宠嚭銆傝┎绯诲垪鑺墖涓昏闈㈠悜閫氫俊銆佸伐妤�(y猫)鎺у埗銆佽埅绌鸿埅澶╁拰鍦嬮槻绛夐牁鍩�锛屾彁渚涢珮搴﹂泦鎴愮殑鍙法绋嬮倧杓В姹烘柟妗�銆�
銆�銆�Artix-7 绯诲垪 FPGA 閲囩敤 28nm 宸ヨ棟鍒堕��锛屽叿鏈夐珮瀵嗗害閭忚集鍠厓銆佽睈瀵岀殑 DSP 妯″銆佸ぇ瀹归噺 Block RAM 鍜岄珮閫熶覆琛屾敹鐧�(f膩)鍣ㄧ瓑鍔熻兘锛岃兘澶犳豢瓒冲京闆滆ō瑷堢殑闇�姹�銆�
鍨嬭櫉锛歑A7A15T-1CPG236Q
銆�銆�鍝佺墝锛歑ilinx
銆�銆�绯诲垪锛欰rtix-7
銆�銆�宸ヨ棟鍒剁▼锛�28nm
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱� 15,00濉婃暩(sh霉)閲忥細40 鍊�
銆�銆�Block RAM 瀹归噺锛�900KB
銆�銆�I/O 鏁�(sh霉)閲忥細236 鍊�
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +125掳C
銆�銆�灏佽椤炲瀷锛欳SP锛堝�掕鑺墖鐞冩煹闄ｅ垪锛�
銆�銆�鏅傞悩璩囨簮锛氬閬� 8 鍊� PLL
XA7A15T-1CPG236Q 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 楂樻�ц兘锛氶噰鐢� 28nm 鍒剁▼鎶�琛�锛岃兘澶犲湪杓冧綆鍔熻�椾笅瀵︾従(xi脿n)楂樻�ц兘閬嬬畻銆�
銆�銆�2. 鍙摯灞曟�э細鏀寔寰炲皬瑕�(gu墨)妯″埌涓瓑瑕�(gu墨)妯¤ō瑷堢殑闈堟椿鎿村睍銆�
銆�銆�3. 鍏�(n猫i)缃瓨鍎插櫒锛氶泦鎴愪簡澶ч噺鐨� Block RAM 鍜屽垎甯冨紡 RAM锛岄仼鍚堟暩(sh霉)鎿�(j霉)绶╁瓨鍜屽瓨鍎叉噳鐢�銆�
銆�銆�4. DSP 鍔熻兘锛氬収(n猫i)缃� DSP Slice锛岃兘澶犲姞閫熸暩(sh霉)瀛椾俊铏熻檿鐞嗕换鍕�銆�
銆�銆�5. 楂橀�熸帴鍙ｏ細鏀寔楂橀仈 6.6Gbps 鐨� GTH 鏀剁櫦(f膩)鍣�锛岄仼鐢ㄤ簬澶氱ó楂橀�熼�氫俊鍗�(xi茅)璀�銆�
銆�銆�6. 澧炲挤鐨� I/O 闈堟椿鎬э細鎻愪緵浜嗚睈瀵岀殑 I/O 妯欐簴鏀寔锛屽寘鎷� LVCMOS銆丩VDS 绛夈��
銆�銆�7. 浣庡姛鑰楀劒(y艒u)鍖栵細閫氶亷 Power-on-Silicon 鎶�琛撻’钁楅檷浣庡姛鑰�锛屽欢闀疯ō鍌欓亱琛屾檪闁�銆�
銆�銆�8. 鍙潬鎬э細灏堢偤鑸┖鑸ぉ鍜屽湅闃叉噳鐢ㄨō瑷�锛屽叿鍌欐姉杓诲皠鑳藉姏銆�
XA7A15T-1CPG236Q 涓昏鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊鍩虹瑷柦锛氬灏忓瀷鍩虹珯銆佸井娉㈠洖鍌崇郴绲�(t菕ng)绛夈��
銆�銆�2. 宸ユキ(y猫)鑷嫊鍖栵細鐢ㄤ簬瀵︽檪鎺у埗銆佸湒鍍忚檿鐞嗙瓑浠诲嫏銆�
銆�銆�3. 鑸┖鑸ぉ鑸囧湅闃诧細鍥犲叾鎶楄蓟灏勭壒鎬�锛屽唬娉涚敤浜庤(w猫i)鏄熼�氫俊銆侀浄閬旂郴绲�(t菕ng)绛�銆�
銆�銆�4. 閱�(y墨)鐧傝ō鍌欙細濡傝秴鑱叉垚鍍忋�丆T 鎺冩弿鍎�绛夐渶瑕侀珮鎬ц兘瑷堢畻鍜屾暩(sh霉)鎿�(j霉)铏曠悊鐨勬噳鐢ㄣ��
銆�銆�5. 娓│娓噺鍎�鍣細渚嬪绀烘尝鍣�銆佷俊铏熺櫦(f膩)鐢熷櫒绛夎ō鍌欎腑鐨勬牳蹇冩帶鍒跺柈鍏冦��
XA7A25T-1CPG236Q
銆�銆�XA7A35T-1CPG236Q
銆�銆�XA7A50T-1CPG236Q
