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鍨嬭櫉锛歑A7A35T-1CSG324Q
銆€銆€鍝佺墝锛歑ilinx
銆€銆€绯诲垪锛欰rtix-7
銆€銆€宸ヨ棟鍒剁▼锛�28nm
銆€銆€FPGA 鏍稿績璩囨簮锛�35K 閭忚集鍠厓
銆€銆€RAM 璩囨簮锛氱磩 1.4Mb 濉� RAM
銆€銆€DSP Slice 鏁�(sh霉)閲忥細90鍊�
銆€銆€閰嶇疆妯″紡锛氬緸 Slave Serial, SelectMAP 鍜� Master SPI
銆€銆€I/O Bank 鏁�(sh霉)閲忥細16
銆€銆€渚涢浕闆诲鑼冨湇锛�0.9V 鑷� 1.0V 鏍稿績闆诲锛�1.8V 鎴� 3.3V I/O 闆诲
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