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鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩肩恫(w菐ng) > IC鐧剧 > XC2VP30-6FF1152I

XC2VP30-6FF1152I 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2022/11/2 16:05:41 鏌ョ湅 闁辫畝锛�641

鐢�(ch菐n)鍝佸瀷铏�(h脿o)

XC2VP30-6FF1152I

鎻忚堪

闆嗘垚闆昏矾FPGA 644 I / O 1152FCBGA

鍒嗛

闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪)

姒傝堪

鐢�(ch菐n)鍝佸瀷铏�(h脿o)

XC2VP30-6FF1152I

鎻忚堪

闆嗘垚闆昏矾FPGA 644 I / O 1152FCBGA

鍒嗛

闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪)

鍒堕�犲晢

Xilinx鍏徃

绯诲垪

Virtex?-IIPro

鎵撳寘

鎵樼洡

闆诲-闆绘簮

1.425V1.575V

宸ヤ綔婧害

-40掳C100掳C(TJ)

鍖呰/绠�

1152-BBGA锛孎(xi脿n)CBGA

渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�

1152-CFCBGA(35x35)

鍩烘湰闆朵欢铏�(h脿o)

XC2VP30

鍙冩暩(sh霉)

鍒堕�犲晢鍖呰瑾槑

35 X 35 MM锛�1 MM闁撹窛锛孧S-034AAR-1锛孎(xi脿n)CBGA-1152

绗﹀悎REACH

鏄�

鍙法绋嬮倧杓鍨�

鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪

鏈�澶ф檪(sh铆)閻橀牷鐜�

1200.0鍏嗚但

CLB-Max鐨勭祫鍚堝欢閬�

0.32绱嶇

JESD-30浠ｇ⒓

S-PBGA-B1152

JESD-609浠ｇ⒓

00

CLB鏁�(sh霉)閲�

3424.0

杓稿叆鏁�(sh霉)閲�

644.0

閭忚集鍠厓鏁�(sh霉)

30816.0

杓稿嚭鏁�(sh霉)閲�

644.0

绔瓙鏁�(sh霉)

1152

绲勭箶

3424 CLBS

鍖呰涓婚珨鏉愭枡

濉戞枡/鐠�(hu谩n)姘фü鑴�

鍖呰浠ｇ⒓

BGA

鍖呰绛夋晥浠ｇ⒓

BGA1152,34X34,40

鍖呰褰㈢媭

鍥涙柟褰�

鍖呰褰㈠紡

缍�(w菐ng)鏍奸櫍鍒�

宄板�煎洖娴佹韩搴�(鈩�)

225

闆绘簮

1.5,1.5 / 3.3,2 / 2.5,2.5

搴ч珮

3.4姣背

瀛愰鍒�

鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪

闆绘簮闆诲妯�(bi膩o)绋�

1.5浼�

鏈�灏忎緵闆婚浕澹�

1.425浼�

鏈�澶ч浕婧愰浕澹�

1.575浼�

瀹夎椤炲瀷

琛ㄩ潰璨艰

鎶�琛�(sh霉)

CMOS

绲傜瀹屾垚

閷�/閴�(Sn63Pb37)

绲傜琛ㄦ牸

鐞�

绔瓙闁撹窛

1.0姣背

绲傜浣嶇疆

搴曢儴

鏅�(sh铆)闁揁宄板�煎洖娴佹韩搴�-鏈�澶у��(绉�)

30

闀�(zh菐ng)搴�

35.0姣背

瀵害

35.0姣背

寮曡叧鍦栬垏鍔熻兘

xc2vp30-6ff1152i鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

  • 鐢�(ch菐n)鍝佸瀷铏�(h脿o)
  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉(h脿o)
  • 瑭㈠児(ji脿)

xc2vp30-6ff1152i鐢�(ch菐n)鍝�

xc2vp30-6ff1152i鍙冩暩(sh霉)

  • 妯�(bi膩o)婧�(zh菙n)鍖呰24
  • 椤炲垾闆嗘垚闆昏矾 (IC)
  • 瀹跺涵宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪锛�
  • 绯诲垪Virtex®-II Pro
  • LAB/CLB鏁�(sh霉)3424
  • 閭忚集鍏冧欢/鍠厓鏁�(sh霉)30816
  • RAM 浣嶇附瑷�(j矛)2506752
  • 杓稿叆/杓稿嚭鏁�(sh霉)644
  • 闁�鏁�(sh霉)-
  • 闆绘簮闆诲1.425 V ~ 1.575 V
  • 瀹夎椤炲瀷琛ㄩ潰璨艰
  • 宸ヤ綔婧害-40°C ~ 100°C
  • 灏佽/澶栨1152-BBGA锛孎(xi脿n)CBGA
  • 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�1152-FCBGA锛�35x35锛�