鏅傞枔锛�2025/4/27 14:51:14
闁辫畝锛�25
XC2VP70-6FF1517C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Virtex-II Pro 绯诲垪 FPGA 涓殑涓�娆鹃珮鎬ц兘鍣ㄤ欢銆傝┎绯诲垪 FPGA 闆嗘垚浜� PowerPC 寰檿鐞嗗櫒鍏�(n猫i)鏍�锛屽叿鏈夊祵鍏ュ紡 DSP 鍔熻兘鍜岄珮閫熶覆琛屾敹鐧�(f膩)鍣紝閬╃敤浜庡京闆滄暩(sh霉)瀛椾俊铏熻檿鐞�銆侀�氫俊绯荤当(t菕ng)瑷▓浠ュ強楂樻�ц兘瑷堢畻绛夋噳鐢ㄩ牁鍩�銆�
銆�銆�XC2VP70-6FF1517C 鎻愪緵浜嗚睈瀵岀殑閭忚集璩囨簮鍜屽挤澶х殑 I/O 鑳藉姏锛屾敮鎸佸绋帴鍙ｆ婧�锛屽彲婊胯冻鍚勭ó寰╅洔鐨勯浕瀛愮郴绲�(t菕ng)闇�姹�銆�
鍨嬭櫉锛歑C2VP70-6FF1517C
銆�銆�灏佽锛欶FG1517 (1517 寮曡叧)
銆�銆�閫熷害绛夌礆锛�-6
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細70,496 鍊� Slice
銆�銆�RAM 瀹归噺锛�5,328 Kb Distributed RAM 鍜� Block RAM
銆�銆�DSP 涔樻硶鍣ㄦ暩(sh霉)閲忥細256 鍊� 18x18 涔樻硶鍣�
銆�銆�I/O 鏁�(sh霉)閲忥細936 鍊嬬敤鎴跺彲鐢� I/O
銆�銆�鍏�(n猫i)閮ㄦ檪閻樼鐞嗭細4 鍊� DCM (鏁�(sh霉)瀛楁檪閻樼鐞嗘ā濉�)
銆�銆�閰嶇疆妯″紡锛歋electMAP 鍜� JTAG
銆�銆�宸ヤ綔婧害鑼冨湇锛氬伐妤�(y猫)绱� -40掳C 鑷� +100掳C
1. 楂樻�ц兘 FPGA 鏋舵锛氬熀浜� Xilinx 鐨勭浜屼唬 Virtex-II Pro 鎶�琛擄紝鏀寔楂橀仈 570 MHz 鐨勯亱琛岄牷鐜�銆�
銆�銆�2. 宓屽叆寮忚檿鐞嗗櫒鏀寔锛氶泦鎴愪簡闆欐牳 PowerPC 405 铏曠悊鍣紝閬╃敤浜庨渶瑕佽粺纭欢绲愬悎鐨勫京闆滅郴绲�(t菕ng)銆�
銆�銆�3. 楂橀�熶覆琛屾敹鐧�(f膩)鍣細鍏�(n猫i)缃閬� 16 鍊� RocketIO 鏀剁櫦(f膩)鍣紝閫熺巼鏀寔寰� 312 Mbps 鍒� 6.25 Gbps锛屽彲鐢ㄤ簬鍏夌簴閫氫俊鍜屽叾浠栭珮閫熸暩(sh霉)鎿�(j霉)鍌宠几銆�
銆�銆�4. 璞愬瘜鐨� DSP 鍔熻兘锛氬寘鍚ぇ閲� 18x18 涔樻硶鍣ㄥ拰灏堢敤閫蹭綅閺堢祼妲�锛岄仼鍚堝鐝�(xi脿n)寰╅洔鏁�(sh霉)瀛椾俊铏熻檿鐞嗙畻娉�銆�
銆�銆�5. 澶氭ǎ鍖栫殑瀛樺劜鍣ㄨ硣婧愶細鎻愪緵鍒嗗竷寮� RAM 鍜屽鐙� RAM 鐨勭祫鍚�锛屼究浜庡鐝�(xi脿n) FIFO銆佺珐娌栧崁(q奴)鎴栧皬鍨嬬珐瀛樼瓑鍔熻兘銆�
銆�銆�6. 楂樺害闈堟椿鐨� I/O 妯欐簴鏀寔锛氬吋瀹瑰绋浕澹撳拰鍗�(xi茅)璀版婧栵紙濡� LVDS銆丠STL銆丼STL 绛夛級锛屼究浜庤垏澶栭儴瑷倷灏嶆帴銆�
銆�銆�7. 鍏�(n猫i)缃(di脿o)瑭﹀伐鍏凤細鏀寔 Embedded Logic Analyzer 鍜� ChipScope 宸ュ叿锛屾柟渚块�茶鍦ㄧ窔瑾�(di脿o)瑭﹀拰椹楄瓑銆�
銆�銆�8. 鍙潬鎬ч珮锛氶�氶亷鍤存牸鐨勬脯瑭︽祦绋嬶紝纰轰繚鍦ㄦ儭鍔ｇ挵(hu谩n)澧冧笅鐨勭┅(w臎n)瀹氭�у拰鍙潬鎬�銆�
1. 閫氫俊鍩虹瑷柦锛氱敤浜庡熀绔欍�佽矾鐢卞櫒銆佷氦鎻涙绛夎ō鍌欎腑鐨勪俊铏熻檿鐞嗗拰鍗�(xi茅)璀拌綁鎻�銆�
銆�銆�2. 鏁�(sh霉)鎿�(j霉)涓績锛氫綔鐐哄崝(xi茅)铏曠悊鍣ㄥ姞閫熺恫(w菐ng)绲″寘铏曠悊銆佸姞瀵嗚В瀵嗕互鍙婂叾浠栭珮鎬ц兘瑷堢畻浠诲嫏銆�
銆�銆�3. 閱�(y墨)鐧傚奖鍍忥細鏀寔瀵︽檪鍦栧儚铏曠悊鍜屽垎鏋�锛屼緥濡傝秴鑱叉尝鎴愬儚鎴� CT 鎺冩弿銆�
銆�銆�4. 宸ユキ(y猫)鑷嫊鍖栵細鐢ㄤ綔鎺у埗鍣ㄦ牳蹇冿紝鍩�(zh铆)琛岄亱鍕曟帶鍒躲�佺媭鎱�(t脿i)鐩�(ji膩n)娓瓑寰╅洔鍔熻兘銆�
銆�銆�5. 姹借粖闆诲瓙锛氬湪楂樼礆椐曢杓斿姪绯荤当(t菕ng) (ADAS) 涓畬鎴愬偝鎰熷櫒铻嶅悎鍜屾焙绛栭倧杓��
銆�銆�6. 鑸┖鑸ぉ锛氱敤浜庡皫鑸�銆侀仚娓�銆佽(w猫i)鏄熼�氫俊绛夐牁鍩�锛屽叿鍌欐姉杓诲皠鍔犲浐鐗堟湰鍙緵閬告搰銆�
XC2VP70-5FF1517C
銆�銆�XC2VP70-7FF1517C
