鏅傞枔锛�2023/8/7 16:49:01
闁辫畝锛�370
鐢�(ch菐n)鍝佸瀷铏� | XC4VLX100-11FF1148C |
鐢熺敘(ch菐n)寤犲 | Xilinx鍏徃 |
| 鍒嗛 | 闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪) |
绯诲垪 | Virtex?-4 LX |
宸ヤ綔婧害 | 0掳C~85掳C(TJ) |
鎻忚堪 | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪锛�12288 CLB锛�1205MHz锛�110592-Cell锛孋MOS锛孭BGA1148 |
鍖�/绠� | 1148-BBGA锛孎(xi脿n)CBGA |
| 渚涙噳鍟嗚ō鍌欏寘 | 1148-FCPBGA(35x35) |
XC4VLX100-11FF1148C
鍙法绋嬮倧杓鍨� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
鐙�鎱�(t脿i) | 娲绘�� |
绗﹀悎REACH妯欐簴 | 鏄� |
鍒堕�犲晢鍖呰瑾槑 | FBGA-1148 |
鏅傞悩闋荤巼-鏈�澶у�� | 1205.0 MHz |
JESD-30浠ｇ⒓ | S-PBGA-B1148 |
JESD-609浠ｇ⒓ | E0 |
CLB鏁�(sh霉)閲� | 12288.0 |
杓稿叆鏁�(sh霉)閲� | 768.0 |
閭忚集鍠厓鐨勬暩(sh霉)閲� | 110592.0 |
杓稿嚭鏁�(sh霉)閲� | 768.0 |
绲傜鏁�(sh霉)閲� | 1148 |
宸ヤ綔婧害-鏈�灏忓�� | 0.0 Cel |
宸ヤ綔婧害-鏈�楂� | 85.0 Cel |
绲勭箶 | 12288 CLBS |
鍖呰楂旀潗鏂� | 濉戞枡/鐠�(hu谩n)姘фü鑴� |
鍖呰９浠ｇ⒓ | BGA |
鍖呯瓑鍍逛唬纰� | BGA1148,34X34,40 |
鍖呰褰㈢媭 | 寤ｅ牬 |
鍖呰棰ㄦ牸 | 缍�(w菐ng)鏍奸櫍鍒� |
宄板�煎洖娴佹韩搴�(Cel) | 225 |
璩囨牸鐙�鎱�(t脿i) | 涓嶅悎鏍� |
鍧愬Э楂樺害-鏈�澶� | 3.4姣背 |
瀛愰鍒� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
闆绘簮闆诲 | 1.2 V |
闆绘簮闆诲-鏈�灏忓�� | 1.14 V |
闆绘簮闆诲-鏈�澶у�� | 1.26 V |
琛ㄩ潰璨艰 | 鏄� |
鎶�琛� | CMOS |
婧害绛夌礆 | 鍏朵粬 |
绲傜瀹屾垚 | 閷�/閴�(Sn63Pb37) |
绲傜琛ㄦ牸 | 鐞� |
绲傜闁撹窛 | 1.0姣背 |
绲傜浣嶇疆 | 搴曢儴 |
鏅傞枔@宄板�煎洖娴佹韩搴�-鏈�澶у�� | 涓夊崄 |
闀峰害 | 35.0姣背 |
瀵害 | 35.0姣背 |
鐒￠墰鐙�鎱�(t脿i)/ RoHS鐙�鎱�(t脿i) | 鍖呭惈閴�/ RoHS涓嶅悎瑕�(gu墨) |
婵曞害鏁忔劅搴︾瓑绱�(MSL) | 4(72灏忔檪) |
XC4VLX100-11FF1148C绗﹁櫉
XC4VLX100-11FF1148C鑵冲嵃
