XC6SLX25-L1FG484C 鏅�(sh铆)闁擄細2025/4/28 17:48:02 闁辫畝锛�31

XC6SLX25-L1FG484C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Spartan-6 绯诲垪 FPGA 鑺墖涓殑涓€鍊�(g猫)鍏烽珨鍨嬭櫉(h脿o)銆傝┎绯诲垪 FPGA 閲濆皪(du矛)浣庢垚鏈拰浣庡姛鑰楁噳(y墨ng)鐢ㄩ€�(j矛n)琛屼簡鍎�(y艒u)鍖�锛屽唬娉涙噳(y墨ng)鐢ㄤ簬宸ユキ(y猫)銆侀€氫俊銆佹秷璨�(f猫i)闆诲瓙浠ュ強閱�(y墨)鐧傜瓑闋�(l菒ng)鍩�銆�
銆€銆€Spartan-6 绯诲垪閲囩敤 45nm 宸ヨ棟鍒堕€�锛屽叿鍌欏彲绶ㄧ▼閭忚集璩囨簮銆佸祵鍏ュ紡濉� RAM銆丏SP 妯″绛夊姛鑳芥ā濉婏紝骞舵敮鎸佸绋帴鍙ｅ崝(xi茅)璀�銆俋C6SLX25 鏄┎绯诲垪涓純灏忚(gu墨)妯＄殑鍣ㄤ欢涔嬩竴锛岄仼鐢ㄤ簬灏�(du矛)璩囨簮闇€姹傞仼涓殑鎳�(y墨ng)鐢ㄥ牬(ch菐ng)鍚�銆�

鍙冩暩(sh霉)

鍨嬭櫉(h脿o)锛歑C6SLX25-L1FG484C
銆€銆€灏佽锛欶G484
銆€銆€宸ヨ棟锛�45nm
銆€銆€閭忚集鍠厓鏁�(sh霉)閲忥細绱� 25,000 鍊�(g猫)
銆€銆€閰嶇疆闁冨瓨锛氱劇鍏�(n猫i)閮ㄩ杻瀛�锛岄渶澶栫疆閰嶇疆 PROM
銆€銆€RAM 瀹归噺锛氱磩 396 Kb Block RAM
銆€銆€DSP Slice 鏁�(sh霉)閲忥細50 鍊�(g猫)
銆€銆€I/O 寮曡叧鏁�(sh霉)锛氭渶澶� 370 鍊�(g猫)鐢ㄦ埗 I/O
銆€銆€宸ヤ綔婧害鑼冨湇锛氬晢妤�(y猫)绱�(j铆)锛�0掳C 鑷� 85掳C锛�
銆€銆€渚涢浕闆诲锛氭牳蹇冮浕澹� 1.2V锛孖/O 闆诲鏍规摎(j霉)閵€琛屼笉鍚屽彲鏀寔 1.2V/1.5V/1.8V/2.5V/3.3V

鐗规€�

XC6SLX25-L1FG484C 鎻愪緵浜嗛珮搴﹂潏娲荤殑鍙法绋嬮倧杓姛鑳�锛屽叾涓昏鐗归粸(di菐n)鍖呮嫭锛�
銆€銆€1. 鍙法绋嬮倧杓祼(ji茅)妲�(g貌u)鍩轰簬 6 杓稿叆鏌ユ壘琛紙LUT锛�锛屾敮鎸侀珮鏁堢殑绲勫悎閭忚集瑷�(sh猫)瑷�(j矛)銆�
銆€銆€2. 鍏�(n猫i)缃睈瀵岀殑鏁�(sh霉)瀛椾俊铏�(h脿o)铏曠悊锛圖SP锛夎硣婧�锛屾瘡鍊�(g猫) DSP Slice 鍖呭惈涔樻硶鍣ㄥ拰绱姞鍣�锛岄仼鍚堝(sh铆)鐝�(xi脿n)楂樻€ц兘瑷�(j矛)绠椾换鍕�(w霉)銆�
銆€銆€3. 澶氶仈(d谩) 396Kb 鐨� Block RAM锛屽彲鐢ㄤ簬鏁�(sh霉)鎿�(j霉)绶╂矕銆丗IFO 鎴栧叾浠栧瓨鍎�(ch菙)鐩搁棞(gu膩n)鎳�(y墨ng)鐢�銆�
銆€銆€4. 鏀寔澶氱ó SERDES锛堜覆琛屾敹鐧�(f膩)鍣級閫熺巼锛屾渶楂樺彲閬�(d谩) 3.125Gbps锛屾豢瓒抽珮閫熸暩(sh霉)鎿�(j霉)鍌宠几闇€姹�銆�
銆€銆€5. 鎻愪緵闈堟椿鐨勬檪(sh铆)閻樼鐞嗗姛鑳斤紝闆嗘垚 PLL 鍜� DCM 妯″锛屾柟渚块€�(j矛n)琛岄牷鐜囧悎鎴愬拰鏅�(sh铆)閻樺垎闋汇€�
銆€銆€6. 閰嶇疆妯″紡澶氭ǎ锛屾敮鎸佸緸澶栭儴 PROM 鎴栦富姗�(j墨)閫氶亷 JTAG 涓嬭級閰嶇疆鏁�(sh霉)鎿�(j霉)銆�
銆€銆€7. 鍔熻€楀劒(y艒u)鍖栬ō(sh猫)瑷�(j矛)锛屾彁渚涘嫊(d貌ng)鎱�(t脿i)鍔熻€楄(di脿o)绡€(ji茅)閬搁爡(xi脿ng)浠ラ仼鎳�(y墨ng)涓嶅悓鐨勬噳(y墨ng)鐢ㄥ牬(ch菐ng)鏅�銆�
銆€銆€8. 寤ｆ硾鍏煎涓绘祦绺界窔鍜屾帴鍙ｆ(bi膩o)婧�(zh菙n)锛屼緥濡� PCIe銆丒thernet MAC銆乁SB 绛夈€�

鎳�(y墨ng)鐢�

XC6SLX25-L1FG484C 甯哥敤浜庝互涓嬮牁(l菒ng)鍩燂細
銆€銆€1. 宸ユキ(y猫)鑷嫊(d貌ng)鍖栨帶鍒�锛屼緥濡� PLC 鎺у埗鍣ㄦ垨閬�(y霉n)鍕�(d貌ng)鎺у埗鍣�銆�
銆€銆€2. 閫氫俊瑷�(sh猫)鍌�锛屽灏忓瀷鍩虹珯銆佽矾鐢卞櫒鎴栦氦鎻涙(j墨)涓殑鏁�(sh霉)鎿�(j霉)鍖呰檿鐞嗘ā濉�銆�
銆€銆€3. 瑕栭牷鑸囧湒鍍忚檿鐞�锛岄仼鐢ㄤ簬瑕栭牷绶ㄧ⒓瑙ｇ⒓銆佸湒鍍忓寮�(qi谩ng)绛変换鍕�(w霉)銆�
銆€銆€4. 娑堣不(f猫i)椤為浕瀛愮敘(ch菐n)鍝�锛屽娓告埐姗�(j墨)銆佹暩(sh霉)纰肩浉姗�(j墨)涓殑杓斿姪铏曠悊鍠厓銆�
銆€銆€5. 閱�(y墨)鐧傝ō(sh猫)鍌欙紝濡傝秴鑱叉尝瑷烘柗鍎€鍣ㄤ腑鐨勪俊铏�(h脿o)铏曠悊閮ㄥ垎銆�
銆€銆€6. 娓�(c猫)瑭︽脯(c猫)閲忓剙鍣�锛屼緥濡傜ず娉㈠櫒銆佷俊铏�(h脿o)鐧�(f膩)鐢熷櫒涓殑鏁�(sh霉)鎿�(j霉)閲囬泦鑸囧垎鏋愭ā濉�銆�
銆€銆€7. 鏁欒偛鑸囩鐮旈牁(l菒ng)鍩�锛屼綔鐐哄(xu茅)缈�(x铆)鍜岄枊鐧�(f膩) FPGA 鎶€琛�(sh霉)鐨勭悊鎯冲钩鑷�(t谩i)銆�