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XC7K410T-2FF676I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Kintex-7 绯诲垪 FPGA 鑺墖涓殑涓�鍊嬪瀷铏熴�傝┎绯诲垪 FPGA 闈㈠悜涓鎳夌敤锛屽叿鏈夐珮鎬ц兘銆佷綆鍔熻�楀拰楂樻�у児姣旂殑鐗归粸銆俋C7K410T 鍖呭惈璞愬瘜鐨勯倧杓硣婧�銆丏SP 妯″銆佸祵鍏ュ紡瀛樺劜鍣ㄤ互鍙婇珮閫熶覆琛屾敹鐧�(f膩)鍣�锛岄仼鐢ㄤ簬閫氫俊銆佸伐妤�(y猫)銆侀啱(y墨)鐧�銆佸唬鎾拰娓│娓噺绛夐牁鍩熺殑寰╅洔瑷▓銆�
銆�銆�瑭茶姱鐗囬噰鐢� 28nm 鍒剁▼宸ヨ棟鍒堕��锛屾彁渚涘挤澶х殑淇¤櫉铏曠悊鑳藉姏鍜岄潏娲荤殑鍙法绋嬫�э紝鏀寔澶氱ó鎺ュ彛妯欐簴鍜屽崝(xi茅)璀�銆�
鍨嬭櫉锛歑C7K410T-2FF676I
銆�銆�绯诲垪锛欿intex-7
銆�銆�鍒剁▼宸ヨ棟锛�28nm
銆�銆�閭忚集鍠厓锛�413,600
銆�銆�DSP Slice 鏁�(sh霉)閲忥細990
銆�銆�Block RAM 瀹归噺锛�5.3Mb
銆�銆�鍏�(n猫i)閮ㄥ瓨鍎插櫒锛氬垎甯冨紡 RAM 鍜� Block RAM
銆�銆�閰嶇疆闁冨瓨锛氫笉闆嗘垚
銆�銆�鏀剁櫦(f膩)鍣ㄩ�熺巼锛氭渶楂� 12.5Gbps
銆�銆�I/O 鏁�(sh霉)閲忥細532
銆�銆�渚涢浕闆诲锛氭牳蹇冮浕澹� 1.0V锛孖/O 闆诲 1.8V/2.5V/3.3V
銆�銆�灏佽锛欶FG676 (17x17mm)
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
XC7K410T-2FF676I 鎻愪緵浜嗛珮搴﹂潏娲荤殑鏋舵锛屽叿鍌欎互涓嬬壒榛烇細
銆�銆�1. 楂樻�ц兘锛氬収(n猫i)缃珮閫熸敹鐧�(f膩)鍣�锛屾敮鎸侀珮閬� 12.5Gbps 鐨勬暩(sh霉)鎿�(j霉)鍌宠几閫熺巼锛屾豢瓒抽珮閫熼�氫俊闇�姹�銆�
銆�銆�2. 寮峰ぇ鐨勯倧杓硣婧愶細鍖呭惈瓒呴亷 40 钀�嬮倧杓柈鍏�锛屾敮鎸佸京闆滅殑鏁�(sh霉)瀛椾俊铏熻檿鐞嗗拰绠楁硶瀵︾従(xi脿n)銆�
銆�銆�3. DSP 鏀寔锛氶厤鍌� 990 鍊� DSP Slice锛岄仼鐢ㄤ簬娴粸閬嬬畻鍜屾烤娉㈠櫒瑷▓銆�
銆�銆�4. 鍏�(n猫i)閮ㄥ瓨鍎插櫒锛氭彁渚涢珮閬� 5.3Mb 鐨� Block RAM锛屾敮鎸佸ぇ瀹归噺鏁�(sh霉)鎿�(j霉)绶╁瓨銆�
銆�銆�5. 澶氭ǎ鍖栫殑 I/O 鏀寔锛氬吋瀹瑰绋婧栵紙濡� PCIe銆丩VDS 鍜� SATA锛�锛屾柟渚胯垏澶栭儴瑷倷浜掕伅(li谩n)銆�
銆�銆�6. 鍔熻�楀劒(y艒u)鍖栵細閲囩敤鍏堥�茬殑 28nm 宸ヨ棟锛屾湁鏁堥檷浣庡姛鑰�銆�
銆�銆�7. 鍙潬鎬э細鏀寔閮ㄥ垎鍕曟厠(t脿i)閲嶆鎶�琛�锛屽厑瑷卞湪閬嬭鏅傞噸鏂伴厤缃儴鍒嗗崁(q奴)鍩�锛屾彁鍗囩郴绲�(t菕ng)闈堟椿鎬с��
銆�銆�8. 闁嬬櫦(f膩)鐢熸厠(t脿i)锛歑ilinx 鎻愪緵浜� Vivado Design Suite 绛夐枊鐧�(f膩)宸ュ叿锛岀啊鍖栬ō瑷堟祦绋嬪苟鎻愰珮鏁堢巼銆�
XC7K410T-2FF676I 寤ｆ硾鎳夌敤浜庡鍊嬮牁鍩燂細
銆�銆�1. 閫氫俊锛氱敤浜庣劇绶氬熀绔�銆佽矾鐢卞櫒鍜屼氦鎻涙绛夎ō鍌欎腑鐨勪俊铏熻檿鐞嗗拰鍗�(xi茅)璀板姞閫熴��
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銆�銆�3. 閱�(y墨)鐧傝ō鍌欙細鏀寔閱�(y墨)瀛告垚鍍�銆佽秴鑱叉尝鍜屾偅鑰呯洠(ji膩n)娓郴绲�(t菕ng)銆�
銆�銆�4. 瑕栭牷寤ｆ挱锛氱敤浜庤闋荤法纰�銆佽В纰煎拰鍦栧儚澧炲挤銆�
銆�銆�5. 娓│娓噺锛氶仼鐢ㄤ簬楂樻�ц兘绀烘尝鍣�銆佷俊铏熺櫦(f膩)鐢熷櫒鍜屽叾浠栨脯瑭﹀剙鍣�銆�
銆�銆�6. 鏁�(sh霉)鎿�(j霉)涓績锛氱敤浣滃崝(xi茅)铏曠悊鍣ㄤ互鍔犻�熺壒瀹氫换鍕欙紙濡傚姞瀵嗗拰澹撶府锛�銆�
銆�銆�鍏跺挤澶х殑鍔熻兘鍜岄潏娲绘�т娇鍏舵垚鐐鸿ū澶氶珮鎬ц兘鎳夌敤鐨勭悊鎯抽伕鎿囥��
XC7K410T-3FFG676I
銆�銆�XC7K420T-2FFG676I
銆�銆�XC7K410T-2FBG676I
