鏅傞枔锛�2025/5/13 11:50:03
闁辫畝锛�19
XC7VX485T-3FFG1930E 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Virtex-7 绯诲垪 FPGA 鑺墖锛屽皥鐐洪珮鎬ц兘瑷堢畻銆佷俊铏熻檿鐞嗗拰寰╅洔宓屽叆寮忕郴绲�(t菕ng)瑷▓銆傝┎绯诲垪鍩轰簬 28nm 宸ヨ棟鍒剁▼锛屽叿鏈夐珮閭忚集瀵嗗害銆侀珮閫熶覆琛岄�ｆ帴鑳藉姏鍜岃睈瀵岀殑 DSP 璩囨簮锛岄仼鍚堜簬閫氫俊銆佽埅绌鸿埅澶�銆侀啱(y墨)鐧傛垚鍍忓拰鏁�(sh霉)鎿�(j霉)涓績鍔犻�熺瓑鎳夌敤闋樺煙銆�
銆�銆�瑭插瀷铏熶腑鐨� XC 琛ㄧず Xilinx 鍟嗘キ(y猫)鐢㈠搧绶�锛�7 琛ㄧず绗竷浠� Virtex 绯诲垪锛孷X485 琛ㄧず鍏烽珨鑺墖鐨勫閲忕瓑绱氾紙485K 閭忚集鍠厓锛�锛孴 鍜� -3 鍒嗗垾琛ㄧず閫熷害绛夌礆锛孎(xi脿n)FG1930 琛ㄧず灏佽椤炲瀷锛孍 鍓囨槸鎿村睍宸ユキ(y猫)婧害鑼冨湇鐗堟湰銆�
閭忚集鍠厓锛�485K
銆�銆�RAM 瀹归噺锛�16.8Mb
銆�銆�DSP Slice 鏁�(sh霉)閲忥細2940
銆�銆�I/O 寮曡叧鏁�(sh霉)锛�1530
銆�銆�閰嶇疆瀛樺劜鍣細鍠�嬫垨澶氬�� Quad SPI Flash
銆�銆�宸ヤ綔闆诲锛�0.9V 鏍稿績闆诲锛�1.0V 杓斿姪闆绘簮
銆�銆�灏佽锛欶FG1930 (1930 寮曡叧)
銆�銆�閫熷害绛夌礆锛�-3
銆�銆�婧害鑼冨湇锛�-40掳C 鑷� +100掳C
XC7VX485T-3FFG1930E 鎻愪緵浜嗗崜瓒婄殑鎬ц兘鍜岄潏娲绘�э紝涓昏鐗规�у寘鎷細
銆�銆�1. 楂橀仈 485K 鐨勯倧杓柈鍏冩敮鎸佸ぇ瑕�(gu墨)妯℃暩(sh霉)瀛楅浕璺泦鎴�銆�
銆�銆�2. 鍏х疆璞愬瘜鐨� DSP Slice锛屽彲楂樻晥瀵︾従(xi脿n)寰╅洔鏁�(sh霉)瀛椾俊铏熻檿鐞嗕换鍕�銆�
銆�銆�3. 鏀寔楂橀仈 13.1 Gbps 鐨� GTX 鏀剁櫦(f膩)鍣紝閬╃敤浜庨珮閫熸暩(sh霉)鎿�(j霉)鍌宠几銆�
銆�銆�4. 闆嗘垚浜� PCIe Gen3 x8 鎺ュ彛鎺у埗鍣�锛屼究浜庤垏涓绘绯荤当(t菕ng)閫氫俊銆�
銆�銆�5. 鎻愪緵闈堟椿鐨勬檪閻樼鐞嗗伐鍏凤紙Clock Management Tiles锛�锛屾敮鎸� PLL 鍜� MMCM 鍔熻兘銆�
銆�銆�6. 鏀寔澶氱ó閰嶇疆妯″紡锛屽寰炲閮� Flash 鍟熷嫊鎴栭�氶亷 JTAG 绶ㄧ▼銆�
銆�銆�7. 閲囩敤楂樼礆鍔熻�楀劒(y艒u)鍖栨妧琛�锛屾彁渚涘嫊鎱�(t脿i)鍔熻�楄绡�(ji茅)鍔熻兘浠ラ檷浣庨亱琛屾垚鏈�銆�
銆�銆�8. 鎿村睍宸ユキ(y猫)绱氭韩搴﹁寖鍦嶏紝纰轰繚鍦ㄦ儭鍔ｇ挵(hu谩n)澧冧笅鐨勫彲闈犳��銆�
閫欐 FPGA 寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊鍩虹瑷柦锛屼緥濡傜劇绶氬熀绔欍�佹湁绶氱恫绲¤矾鐢卞櫒鍜屼氦鎻涙銆�
銆�銆�2. 楂橀�熸暩(sh霉)鎿�(j霉)閲囬泦鑸囪檿鐞嗙郴绲�(t菕ng)锛屼緥濡傞浄閬斿拰琛�(w猫i)鏄熼�氫俊瑷倷銆�
銆�銆�3. 閱�(y墨)鐧傚奖鍍忚ō鍌�锛屽 CT 鎺冩弿鍎�鍜岃秴鑱叉尝姗熷櫒銆�
銆�銆�4. 鏁�(sh霉)鎿�(j霉)涓績鍔犻�熷崱锛岀敤浜庡姞瀵嗚В瀵嗐�佽闋昏綁纰肩瓑浠诲嫏銆�
銆�銆�5. 姹借粖闆诲瓙绯荤当(t菕ng)涓殑瀵︽檪鍦栧儚铏曠悊鍜屽偝鎰熷櫒铻嶅悎銆�
銆�銆�6. 宸ユキ(y猫)鑷嫊鍖栨帶鍒�锛屼緥濡傞亱鍕曟帶鍒跺櫒鍜屾鍣ㄤ汉绯荤当(t菕ng)銆�
銆�銆�7. 绉戝鐮旂┒涓殑楂樻�ц兘瑷堢畻骞宠嚭锛屼緥濡傜矑瀛愮墿鐞嗗椹楁暩(sh霉)鎿�(j霉)鍒嗘瀽銆�
XC7VX485T-2FFG1930E
銆�銆�XC7VX485T-3FFG1761E
銆�銆�XC7VX485T-3FFG1156E
