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XCKU025-2FFVA1156E 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Kintex UltraScale 绯诲垪 FPGA 鑺墖锛岄噰鐢� 20nm 鍒剁▼宸ヨ棟鍒堕�犮�傝┎绯诲垪鑺墖灏堢偤楂樻�ц兘銆佷綆鍔熻�楁噳鐢ㄨ�岃ō瑷堬紝閬╃敤浜庨�氫俊銆佹暩(sh霉)鎿�(j霉)涓績銆佽埅绌鸿埅澶╄垏鍦嬮槻绛夐牁(l菒ng)鍩�銆�
銆�銆�閫欐 FPGA 鎻愪緵浜嗚睈瀵岀殑閭忚集璩囨簮銆侀珮閫熶覆琛屾敹鐧�(f膩)鍣ㄤ互鍙婂ぇ瀹归噺鐨勫瀛樺劜鍣ㄥ拰 DSP 妯″锛岃兘澶犳豢瓒冲京闆滅畻娉曞鐝�(xi脿n)銆佹暩(sh霉)鎿�(j霉)铏曠悊鍙婁俊铏熷偝杓�?sh霉)鐢锋灗锜�?/p>
鍨嬭櫉锛歑CKU025-2FFVA1156E
銆�銆�鍒剁▼宸ヨ棟锛�20nm
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱� 25K
銆�銆�RAM 瀹归噺锛�3.8Mb
銆�銆�DSP Slice 鏁�(sh霉)閲忥細1260
銆�銆�閰嶇疆妯″紡锛歋electMAP, JTAG
銆�銆�I/O 寮曡叧鏁�(sh霉)閲忥細744
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆�銆�灏佽褰㈠紡锛欶FGA1156
XCKU025-2FFVA1156E 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 楂樻�ц兘鏋舵(g貌u)锛歎ltraScale 鏋舵(g貌u)鎻愪緵浜嗘洿楂樼殑鏅傞悩闋荤巼鍜屽悶鍚愰噺锛屾敮鎸佸京闆滅殑鏁�(sh霉)瀛椾俊铏熻檿鐞嗕换鍕�銆�
銆�銆�2. 澶у閲忛倧杓硣婧愶細鎿佹湁绱� 25K 鍊嬮倧杓柈鍏冿紝鍙豢瓒充腑绛夎(gu墨)妯¤ō瑷堥渶姹�銆�
銆�銆�3. 璞愬瘜澶栬ō鎺ュ彛锛氭敮鎸佸绋婧栨帴鍙ｅ崝(xi茅)璀帮紝濡� PCIe銆乁SB銆佷互澶恫(w菐ng)绛�銆�
銆�銆�4. 楂橀�熸敹鐧�(f膩)鍣細鏈�楂樻敮鎸� 16.3Gbps 鐨勬敹鐧�(f膩)閫熺巼锛岀⒑淇濋珮鏁堢殑鏁�(sh霉)鎿�(j霉)鍌宠几銆�
銆�銆�5. 鍏�(n猫i)缃‖鏍歌檿鐞嗗櫒锛氶儴鍒嗗瀷铏熷寘鍚� ARM Cortex-A53 鎴� A9 铏曠悊鍣紝閬╁悎杌熺‖浠跺崝(xi茅)鍚岃ō瑷�銆�
銆�銆�6. 鍔熻�楀劒(y艒u)鍖栵細閲囩敤鍕曟厠(t脿i)鍔熻�楃鐞嗘妧琛�(sh霉)锛屽彲鏍规摎(j霉)瀵﹂殯璨犺級瑾�(di脿o)鏁撮亱琛岀媭鎱�(t脿i)浠ラ檷浣庡姛鑰�銆�
XCKU025-2FFVA1156E 寤ｆ硾鎳夌敤浜庝互涓嬮牁(l菒ng)鍩燂細
銆�銆�1. 閫氫俊绯荤当(t菕ng)锛氱敤浜庣劇绶氬熀绔�銆佸厜鍌宠几缍�(w菐ng)绲′腑鐨勪俊铏熻檿鐞嗗拰鍗�(xi茅)璀拌綁(zhu菐n)鎻涖��
銆�銆�2. 鏁�(sh霉)鎿�(j霉)涓績鍔犻�燂細鎻愪緵楂樻晥鐨勮▓绠楀姞閫熻兘鍔�锛岀敤浜� AI 鎺ㄧ悊銆佹暩(sh霉)鎿�(j霉)鍒嗘瀽绛変换鍕�銆�
銆�銆�3. 宸ユキ(y猫)鎺у埗锛氬鐝�(xi脿n)楂樼簿搴﹂亱鍕曟帶鍒跺拰瀵︽檪鏁�(sh霉)鎿�(j霉)閲囬泦銆�
銆�銆�4. 閱�(y墨)鐧傛垚鍍忥細鐢ㄤ簬瓒呰伈娉㈣ō鍌�銆丆T 鎺冩弿鍎�绛夊湒鍍忚檿鐞嗙挵(hu谩n)绡�(ji茅)銆�
銆�銆�5. 鍦嬮槻鑸囪埅澶╋細婊胯冻鎯″姡鐠�(hu谩n)澧冧笅鍙潬鎬у拰楂樻�ц兘鐨勮姹�銆�
XCKU040-2FFVA1156I,XCKU060-2FFVA1156E
