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鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩肩恫(w菐ng) > IC鐧剧 > XCZU11EG-1FFVF1517E

XCZU11EG-1FFVF1517E 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2025/4/28 16:48:58 鏌ョ湅 闁辫畝锛�33

XCZU11EG-1FFVF1517E 鏄竴娆剧敱 Xilinx锛堣辰闈堟�濓級鐢熺敘(ch菐n)鐨勯珮鎬ц兘 FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪锛夈�傝┎鍨嬭櫉(h脿o)灞簬 Zynq UltraScale+ MPSoC 绯诲垪锛岄泦鎴愪簡 ARM 铏曠悊鍣ㄨ垏 FPGA 鍙法绋嬮倧杓�锛岄仼鍚堜簬闇�瑕侀珮瑷�(j矛)绠楁�ц兘鍜屽(sh铆)鏅�(sh铆)铏曠悊鑳藉姏鐨勬噳(y墨ng)鐢ㄥ牬(ch菐ng)鏅�銆�
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鍙冩暩(sh霉)

绯诲垪锛歓ynq UltraScale+ MPSoC
銆�銆�鍨嬭櫉(h脿o)锛歑CZU11EG-1FFVF1517E
銆�銆�灏佽锛欶FG1517
銆�銆�I/O 鏁�(sh霉)閲忥細2304
銆�銆�瀛樺劜(ch菙)鍣細6.8Mb Block RAM
銆�銆�DSP Slice锛�1920
銆�銆�宸ヨ棟绡�(ji茅)榛�(di菐n)锛�16nm
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銆�銆�渚涢浕闆诲锛�1.0V 鏍稿績锛�1.8V I/O

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鏇夸唬鍨嬭櫉(h脿o)

XCZU9EG-1FFVC1517E
銆�銆�XCZU15EG-1FFVF1760E
銆�銆�XCZU7EV-2FFVG1517E

xczu11eg-1ffvf1517e鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

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  • 寤犲晢
  • 灏佽/鎵硅櫉(h脿o)
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xczu11eg-1ffvf1517e鍙冩暩(sh霉)

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