灏佽�濓細L2SFVA625
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +125掳C
銆�銆�I/O 鏁�(sh霉)閲忥細3378
銆�銆�FPGA 鏋舵��(g貌u)锛歎ltraScale+
銆�銆�铏曠悊鍣�锛氬洓鏍� ARM Cortex-A53 + 闆欐牳 ARM Cortex-R5
銆�銆�瀛樺劜鍣�锛氶珮閬� 64MB 鐨勭墖涓� RAM
銆�銆�鏈�澶х敤鎴� I/Os锛�3378
銆�銆�閰嶇疆妯″紡锛歅rimary Slave SelectMAP, Primary SPI

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XCZU3EG-L2SFVA625E
銆�銆�XCZU4EV-L2SFVA625E