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鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩肩恫(w菐ng) > IC鐧剧 > XC4VLX100-10FF1148I

XC4VLX100-10FF1148I 鐧�(f膩)甯冩檪闁� 鏅傞枔锛�2023/8/7 16:31:47 鏌ョ湅 闁辫畝锛�335

鐢�(ch菐n)鍝佹杩�

鐢�(ch菐n)鍝佸瀷铏�

XC4VLX100-10FF1148I

闆朵欢椤炲垾

鍙法绋嬮倧杓疘C

鍒堕�犲晢

Xilinx锛孖nc銆�

鍘熷粻灏佽

1148-FCPBGA

鎻忚堪

鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪锛�12288 CLB锛�1028MHz锛�110592-Cell锛孋MOS锛孭BGA1148

鐢�(ch菐n)鍝佸湒鐗�

XC4VLX100-10FF1148I

XC4VLX100-10FF1148I

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鐙�鎱�(t脿i)

娲绘��

鍙法绋嬮倧杓鍨�

鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪

鏅傞悩闋荤巼 - 鏈�澶у��

1028.0 MHz

JESD-30浠ｇ⒓

S-PBGA-B1148

JESD-609浠ｇ⒓

E0

CLB鏁�(sh霉)閲�

12288.0

杓稿叆鏁�(sh霉)閲�

768.0

閭忚集鍠厓鐨勬暩(sh霉)閲�

110592.0

杓稿嚭鏁�(sh霉)閲�

768.0

绲傜鏁�(sh霉)閲�

1148

绲勭箶

12288 CLBS

绗﹀悎REACH妯欐簴

鏄�

鍖呰楂旀潗鏂�

濉戞枡/鐠�(hu谩n)姘фü鑴�

鍖呰９浠ｇ⒓

BGA

鍖呯瓑鍍逛唬纰�

BGA1148,34X34,40

鍖呰褰㈢媭

寤ｅ牬

鍖呰棰ㄦ牸

缍�(w菐ng)鏍奸櫍鍒�

宄板�煎洖娴佹韩搴�(Cel)

225

璩囨牸鐙�鎱�(t脿i)

涓嶅悎鏍�

鍧愬Э楂樺害 - 鏈�澶�

3.4姣背

瀛愰鍒�

鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪

闆绘簮闆诲

1.2 V

闆绘簮闆诲 - 鏈�灏忓��

1.14 V

闆绘簮闆诲 - 鏈�澶у��

1.26 V

琛ㄩ潰璨艰

鏄�

鎶�琛�(sh霉)

CMOS

绲傜瀹屾垚

閷�/閴�(Sn63Pb37)

绲傜琛ㄦ牸

鐞�

绲傜闁撹窛

1.0姣背

绲傜浣嶇疆

搴曢儴

鏅傞枔@宄板�煎洖娴佹韩搴�-鏈�澶у��

30

闀峰害

35.0姣背

瀵害

35.0姣背

鍎插瓨鎯呮硜

骞茬嚗鍎插瓨鏌滃拰婵曞害淇濊鍖�

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

鐒￠墰鐙�鎱�(t脿i)/RoHS鐙�鎱�(t脿i)鍖呭惈閴�/RoHS涓嶅悎瑕�(gu墨)
婵曞害鏁忔劅搴︾瓑绱�(MSL)4(72灏忔檪)

CAD妯″瀷

XC4VLX100-10FF1148I绗﹁櫉.png

XC4VLX100-10FF1148I绗﹁櫉

XC4VLX100-10FF1148I鑵冲嵃.jpg

XC4VLX100-10FF1148I鑵冲嵃

xc4vlx100-10ff1148i鎺ㄨ枽渚涙噳鍟� 鏇村>

  • 鐢�(ch菐n)鍝佸瀷铏�
  • 渚涙噳鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉
  • 瑭㈠児

xc4vlx100-10ff1148i鍦栫墖

xc4vlx100-10ff1148i

xc4vlx100-10ff1148i鍙冩暩(sh霉)

  • 妯欐簴鍖呰24
  • 椤炲垾闆嗘垚闆昏矾 (IC)
  • 瀹跺涵宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪锛�
  • 绯诲垪Virtex®-4 LX
  • LAB/CLB鏁�(sh霉)12288
  • 閭忚集鍏冧欢/鍠厓鏁�(sh霉)110592
  • RAM 浣嶇附瑷�4423680
  • 杓稿叆/杓稿嚭鏁�(sh霉)768
  • 闁�鏁�(sh霉)-
  • 闆绘簮闆诲1.14 V ~ 1.26 V
  • 瀹夎椤炲瀷琛ㄩ潰璨艰
  • 宸ヤ綔婧害-40°C ~ 100°C
  • 灏佽/澶栨1148-BBGA锛孎(xi脿n)CBGA
  • 渚涙噳鍟嗚ō鍌欏皝瑁�1148-FCPBGA锛�35x35锛�