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鎮ㄥソ锛屾杩庝締(l谩i)鍒扮董搴�(k霉)闆诲瓙甯傚牬(ch菐ng)缍�(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺(c猫)

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩�(g貌u)缍�(w菐ng) > IC鐧剧 > XC5VLX330-2FFG1760C

XC5VLX330-2FFG1760C 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2025/5/9 18:36:49 鏌ョ湅 闁辫畝锛�27

XC5VLX330-2FFG1760C鏄疿ilinx鍏徃鎺ㄥ嚭鐨刅irtex-5绯诲垪FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄ｅ垪锛変腑鐨勪竴娆鹃珮绔瀷铏�(h脿o)銆傝┎鑺墖閲囩敤鍏堥��(j矛n)鐨�65nm宸ヨ棟鍒堕�狅紝鍏锋湁楂橀倧杓瘑搴�銆侀珮鎬ц兘鍜屼綆鍔熻�楃殑鐗归粸(di菐n)銆傚畠寤ｆ硾鎳�(y墨ng)鐢ㄤ簬閫氫俊銆佸伐妤�(y猫)鎺у埗銆佸湒鍍忚檿鐞�銆佽埅绌鸿埅澶╀互鍙婅粛浜嬬瓑闇�瑕佸京(f霉)闆滄暩(sh霉)瀛椾俊铏�(h脿o)铏曠悊鐨勯牁(l菒ng)鍩熴��
銆�銆�XC5VLX330灞簬Virtex-5 LX绯诲垪锛岄仼鐢ㄤ簬閭忚集鎿�(ku貌)灞曟噳(y墨ng)鐢紝鍏锋湁璞愬瘜鐨凞SP Slice鍜孊lock RAM璩囨簮锛屽悓鏅�(sh铆)鏀寔澶氱ó鎺ュ彛鍗�(xi茅)璀板拰楂橀�熶覆琛屾敹鐧�(f膩)鍣�锛岃兘澶犳豢(m菐n)瓒充笉鍚屾噳(y墨ng)鐢ㄥ牬(ch菐ng)鏅殑闇�姹�銆�

鍙冩暩(sh霉)

鍨嬭櫉(h脿o)锛歑C5VLX330-2FFG1760C
銆�銆�绯诲垪锛歏irtex-5 LX
銆�銆�宸ヨ棟锛�65nm
銆�銆�閭忚集鍠厓鏁�(sh霉)锛�33钀�(w脿n)
銆�銆�DSP Slice鏁�(sh霉)閲忥細960
銆�銆�Block RAM澶у皬锛�14Mb
銆�銆�閰嶇疆妯″紡锛歋electMAP, Master/Slave SPI, Boundary Scan
銆�銆�I/O寮曡叧鏁�(sh霉)锛�1096
銆�銆�渚涢浕闆诲锛氭牳蹇冮浕澹�1.0V锛孖/O闆诲1.5V/1.8V/2.5V/3.3V
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C鑷�+85掳C
銆�銆�灏佽椤�(l猫i)鍨嬶細FFG1760

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XC5VLX330-2FFG1760C鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 楂樻�ц兘鏋舵(g貌u)锛氬熀浜嶸irtex-5绯诲垪鐨勭当(t菕ng)涓�绲�(ji茅)妲�(g貌u)瑷�(sh猫)瑷�(j矛)锛屾彁渚涙サ楂樼殑閭忚集鍒╃敤鐜囧拰闈堟椿鎬�銆�
銆�銆�2. 璞愬瘜鐨勫祵鍏ュ紡瀛樺劜(ch菙)鍣細鍖呭惈澶氶仈(d谩)14Mb鐨凚lock RAM璩囨簮锛岄仼鍚堝京(f霉)闆滄暩(sh霉)鎿�(j霉)绶╂矕鍜屽瓨鍎�(ch菙)闇�姹�銆�
銆�銆�3. 寮�(qi谩ng)澶х殑DSP鍔熻兘锛氶厤鍌�960鍊�(g猫)DSP Slice锛屽彲瀵�(sh铆)鐝�(xi脿n)楂樻晥娴粸(di菐n)閬�(y霉n)绠楀強鏁�(sh霉)瀛椾俊铏�(h脿o)铏曠悊浠诲嫏(w霉)銆�
銆�銆�4. 澶氱ó涓茶鎺ュ彛锛氭敮鎸侀珮閬�(d谩)6.5Gbps鐨凴ocketIO GTX鏀剁櫦(f膩)鍣�锛屽吋瀹筆CIe銆丼ATA銆佸崈鍏嗕互澶恫(w菐ng)绛夊绋(bi膩o)婧�(zh菙n)鍗�(xi茅)璀�銆�
銆�銆�5. 鍙潬鎬ц垏绌�(w臎n)瀹氭�э細閫氶亷(gu貌)鍎�(y艒u)鍖栫殑甯冨眬甯冪窔绠楁硶鍜屾檪(sh铆)閻樼鐞嗘妧琛�(sh霉)锛岀⒑淇濈郴绲�(t菕ng)鍦ㄥ京(f霉)闆滅挵(hu谩n)澧冧笅鐨勭┅(w臎n)瀹氶亱(y霉n)琛屻��
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銆�銆�7. 鏀寔澶氱ó閰嶇疆鏂瑰紡锛氬寘鎷緸澶栭儴瀛樺劜(ch菙)鍣ㄥ姞杓変綅娴佹垨閫氶亷(gu貌)JTAG閫�(j矛n)琛屽湪绶氳(di脿o)瑭︾瓑鍔熻兘銆�
銆�銆�8. 缍犺壊鐠�(hu谩n)淇濊ō(sh猫)瑷�(j矛)锛氱鍚圧oHS妯�(bi膩o)婧�(zh菙n)锛岄檷浣庡皪(du矛)鐠�(hu谩n)澧冪殑褰遍熆銆�

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XC5VLX330-2FFG1760C閬╃敤浜庝互涓嬮牁(l菒ng)鍩燂細
銆�銆�1. 閫氫俊瑷�(sh猫)鍌欙細濡傝矾鐢卞櫒銆佷氦鎻涙(j墨)銆佸熀绔欎腑鐨勪俊铏�(h脿o)铏曠悊妯″銆�
銆�銆�2. 瑕栭牷铏曠悊锛氶珮娓呰闋荤法纰艰В纰�銆佸湒鍍忓寮�(qi谩ng)銆佽瑕�(ju茅)璀�(sh铆)鍒�銆�
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銆�銆�4. 鑸┖鑸ぉ鑸囧湅(gu贸)闃诧細闆烽仈(d谩)淇¤櫉(h脿o)铏曠悊銆佽(w猫i)鏄熼�氫俊銆佸皫(d菐o)鑸郴绲�(t菕ng)銆�
銆�銆�5. 閱�(y墨)鐧傛垚鍍忥細瓒呰伈娉㈡垚鍍忋�丆T鎺冩弿鍎�鐨勬暩(sh霉)鎿�(j霉)铏曠悊銆�
銆�銆�6. 娓�(c猫)瑭︽脯(c猫)閲忥細绀烘尝鍣�銆佷俊铏�(h脿o)鐧�(f膩)鐢熷櫒绛夊剙鍣ㄤ腑鐨勯棞(gu膩n)閸电祫浠躲��

鏇夸唬鍨嬭櫉(h脿o)

XC5VLX330T-2FFG1760C
銆�銆�XC5VLX330-3FFG1760C

xc5vlx330-2ffg1760c鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

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  • 寤犲晢
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xc5vlx330-2ffg1760c鐢�(ch菐n)鍝�

xc5vlx330-2ffg1760c鍙冩暩(sh霉)

  • 妯�(bi膩o)婧�(zh菙n)鍖呰1
  • 椤�(l猫i)鍒�闆嗘垚闆昏矾 (IC)
  • 瀹跺涵宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄ｅ垪锛�
  • 绯诲垪Virtex®-5 LX
  • LAB/CLB鏁�(sh霉)25920
  • 閭忚集鍏冧欢/鍠厓鏁�(sh霉)331776
  • RAM 浣嶇附瑷�(j矛)10616832
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  • 宸ヤ綔婧害0°C ~ 85°C
  • 灏佽/澶栨1760-BBGA锛孎(xi脿n)CBGA
  • 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�1760-FCBGA
  • 閰嶇敤568-5088-ND - BOARD DEMO DAC1408D750HW-V5-ML525-UNI-G-ND - EVAL PLATFORM ROCKET IO VIRTEX-5HW-AFX-FF1760-500-G-ND - BOARD DEV VIRTEX 5 FF1760